From f6fd0af5ed5bd7820f3c1e590ef01d447f299382 Mon Sep 17 00:00:00 2001 From: Dinesh T Date: Tue, 8 Mar 2022 10:10:00 +0000 Subject: [PATCH] gpu: nvgpu: Add ce_lce control register This is adding the following register and respective fields NV_CE_LCE_ENGCTL NV_CE_LCE_ENGCTL_STALLREQ_TRUE NV_CE_LCE_ENGCTL_STALLACK_TRUE Bug 200641946 Change-Id: I975fde996de693137322ca013f1ca5e170f7439a Signed-off-by: Dinesh T Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2678059 Reviewed-by: svcacv Reviewed-by: Antony Clince Alex Reviewed-by: Vaibhav Kachore GVS: Gerrit_Virtual_Submit --- drivers/gpu/nvgpu/include/nvgpu/hw/ga100/hw_ce_ga100.h | 6 +++++- drivers/gpu/nvgpu/include/nvgpu/hw/ga10b/hw_ce_ga10b.h | 6 +++++- drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_ce_gv11b.h | 6 +++++- drivers/gpu/nvgpu/include/nvgpu/hw/tu104/hw_ce_tu104.h | 6 +++++- 4 files changed, 20 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/nvgpu/include/nvgpu/hw/ga100/hw_ce_ga100.h b/drivers/gpu/nvgpu/include/nvgpu/hw/ga100/hw_ce_ga100.h index 8ca9a1802..084297d98 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/hw/ga100/hw_ce_ga100.h +++ b/drivers/gpu/nvgpu/include/nvgpu/hw/ga100/hw_ce_ga100.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -75,4 +75,8 @@ #define ce_lce_opt_r(i)\ (nvgpu_safe_add_u32(0x00104414U, nvgpu_safe_mult_u32((i), 128U))) #define ce_lce_opt_force_barriers_npl__prod_f() (0x8U) +#define ce_lce_engctl_r(i)\ + (nvgpu_safe_add_u32(0x0010441cU, nvgpu_safe_mult_u32((i), 128U))) +#define ce_lce_engctl_stallreq_true_f() (0x100U) +#define ce_lce_engctl_stallack_true_f() (0x200U) #endif diff --git a/drivers/gpu/nvgpu/include/nvgpu/hw/ga10b/hw_ce_ga10b.h b/drivers/gpu/nvgpu/include/nvgpu/hw/ga10b/hw_ce_ga10b.h index 56ebab665..8d253aa62 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/hw/ga10b/hw_ce_ga10b.h +++ b/drivers/gpu/nvgpu/include/nvgpu/hw/ga10b/hw_ce_ga10b.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -108,4 +108,8 @@ #define ce_lce_intr_ctrl_cpu_m() (U32(0x1U) << 31U) #define ce_lce_intr_ctrl_cpu_enable_f() (0x80000000U) #define ce_lce_intr_ctrl_cpu_disable_f() (0x0U) +#define ce_lce_engctl_r(i)\ + (nvgpu_safe_add_u32(0x0010441cU, nvgpu_safe_mult_u32((i), 128U))) +#define ce_lce_engctl_stallreq_true_f() (0x100U) +#define ce_lce_engctl_stallack_true_f() (0x200U) #endif diff --git a/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_ce_gv11b.h b/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_ce_gv11b.h index 5a3067b02..4544da4d7 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_ce_gv11b.h +++ b/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_ce_gv11b.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2016-2019, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2016-2022, NVIDIA CORPORATION. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -75,4 +75,8 @@ #define ce_lce_opt_r(i)\ (nvgpu_safe_add_u32(0x00104414U, nvgpu_safe_mult_u32((i), 128U))) #define ce_lce_opt_force_barriers_npl__prod_f() (0x8U) +#define ce_lce_engctl_r(i)\ + (nvgpu_safe_add_u32(0x0010441cU, nvgpu_safe_mult_u32((i), 128U))) +#define ce_lce_engctl_stallreq_true_f() (0x100U) +#define ce_lce_engctl_stallack_true_f() (0x200U) #endif diff --git a/drivers/gpu/nvgpu/include/nvgpu/hw/tu104/hw_ce_tu104.h b/drivers/gpu/nvgpu/include/nvgpu/hw/tu104/hw_ce_tu104.h index 2971d626d..3664cf5cc 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/hw/tu104/hw_ce_tu104.h +++ b/drivers/gpu/nvgpu/include/nvgpu/hw/tu104/hw_ce_tu104.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2018-2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2018-2022, NVIDIA CORPORATION. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -75,6 +75,10 @@ #define ce_lce_opt_r(i)\ (nvgpu_safe_add_u32(0x00104414U, nvgpu_safe_mult_u32((i), 128U))) #define ce_lce_opt_force_barriers_npl__prod_f() (0x8U) +#define ce_lce_engctl_r(i)\ + (nvgpu_safe_add_u32(0x0010441cU, nvgpu_safe_mult_u32((i), 128U))) +#define ce_lce_engctl_stallreq_true_f() (0x100U) +#define ce_lce_engctl_stallack_true_f() (0x200U) #define ce_grce_config_r(i)\ (nvgpu_safe_add_u32(0x00104034U, nvgpu_safe_mult_u32((i), 4U))) #define ce_grce_config__size_1_v() (0x00000002U)