From f73da1dfe535a33c28dd8808f2051edf0cf819fe Mon Sep 17 00:00:00 2001 From: vinodg Date: Wed, 2 Oct 2019 17:53:32 -0700 Subject: [PATCH] gpu: nvgpu: code correction in gr ecc unit FECS_FEATURE_OVERRIDE_ECC bits for SM_L0_CACHE and SM_L1_CHACHE need to be checked against NV_PGRAPH_PRI_FECS_FEATURE_OVERRIDE_ECC_1 register. Correct the error of checking those bits against NV_PGRAPH_PRI_FECS_FEATURE_OVERRIDE_ECC register. Jira NVGPU-4095 Change-Id: I09737b83496f9e728e0b022bd6a4e75741bd0c49 Signed-off-by: vinodg Reviewed-on: https://git-master.nvidia.com/r/2210429 Reviewed-by: svc-mobile-coverity Reviewed-by: svc-mobile-misra Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Alex Waterman GVS: Gerrit_Virtual_Submit Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/hal/gr/ecc/ecc_gv11b_fusa.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/nvgpu/hal/gr/ecc/ecc_gv11b_fusa.c b/drivers/gpu/nvgpu/hal/gr/ecc/ecc_gv11b_fusa.c index 7f497f4f5..f1857d443 100644 --- a/drivers/gpu/nvgpu/hal/gr/ecc/ecc_gv11b_fusa.c +++ b/drivers/gpu/nvgpu/hal/gr/ecc/ecc_gv11b_fusa.c @@ -136,6 +136,9 @@ void gv11b_ecc_detect_enabled_units(struct gk20a *g) u32 fecs_feature_override_ecc = nvgpu_readl(g, gr_fecs_feature_override_ecc_r()); + u32 fecs_feature_override_ecc_1 = + nvgpu_readl(g, + gr_fecs_feature_override_ecc_1_r()); if (opt_feature_fuses_override_disable) { if (opt_ecc_en) { @@ -162,7 +165,7 @@ void gv11b_ecc_detect_enabled_units(struct gk20a *g) fecs_feature_override_ecc, opt_ecc_en); /* SM ICACHE*/ gv11b_ecc_enable_smicache(g, - fecs_feature_override_ecc, opt_ecc_en); + fecs_feature_override_ecc_1, opt_ecc_en); /* LTC */ gv11b_ecc_enable_ltc(g, fecs_feature_override_ecc, opt_ecc_en);