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gpu: nvgpu: doxygen for GR private structures [1/2]

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Add doxygen documentation for private GR structures defined in:
gr/ctx_priv.h
gr/global_ctx_priv.h
gr/obj_ctx_priv.h
gr/subctx_priv.h

Compile out struct zcull_ctx_desc with flag CONFIG_NVGPU_GRAPHICS.
Compile out struct pm_ctx_desc with flag CONFIG_NVGPU_DEBUGGER.

Compile out field golden_img_loaded with flag CONFIG_NVGPU_NON_FUSA
since it is only used for VSERVER.

Jira NVGPU-4028

Change-Id: Ic63e751ee28c6b645cc13993b16f701a9dbcf3e0
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2201372
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Deepak Nibade
2019-09-17 15:27:48 +05:30
committed by Alex Waterman
parent 99f775b622
commit f74506be00
4 changed files with 139 additions and 2 deletions
Download Patch File Download Diff File Expand all files Collapse all files

84
drivers/gpu/nvgpu/common/gr/ctx_priv.h
View File

@@ -25,27 +25,53 @@
struct nvgpu_mem;
/**
* Patch context buffer descriptor structure.
*
* Pointer to this structure is maintained in #nvgpu_gr_ctx structure.
*/
struct patch_desc {
/**
* Memory to hold patch context buffer.
*/
struct nvgpu_mem mem;
/**
* Count of entries written into patch context buffer.
*/
u32 data_count;
};
#ifdef CONFIG_NVGPU_GRAPHICS
struct zcull_ctx_desc {
u64 gpu_va;
u32 ctx_sw_mode;
};
#endif
#ifdef CONFIG_NVGPU_DEBUGGER
struct pm_ctx_desc {
struct nvgpu_mem mem;
u64 gpu_va;
u32 pm_mode;
};
#endif
/**
* GR context descriptor structure.
*
* This structure stores various properties of all GR context buffers.
*/
struct nvgpu_gr_ctx_desc {
/**
* Array to store all GR context buffer sizes.
*/
u32 size[NVGPU_GR_CTX_COUNT];
#ifdef CONFIG_NVGPU_GRAPHICS
bool force_preemption_gfxp;
#endif
#ifdef CONFIG_NVGPU_CILP
bool force_preemption_cilp;
#endif
@@ -55,9 +81,27 @@ struct nvgpu_gr_ctx_desc {
#endif
};
/**
* Graphics context buffer structure.
*
* This structure stores all the properties of a graphcis context
* buffer. One graphics context is allocated per GPU Time Slice
* Group (TSG).
*/
struct nvgpu_gr_ctx {
/**
* Context ID read from graphics context buffer.
*/
u32 ctx_id;
/**
* Flag to indicate if above context ID is valid or not.
*/
bool ctx_id_valid;
/**
* Memory to hold graphics context buffer.
*/
struct nvgpu_mem mem;
#ifdef CONFIG_NVGPU_GRAPHICS
@@ -68,17 +112,36 @@ struct nvgpu_gr_ctx {
struct nvgpu_mem gfxp_rtvcb_ctxsw_buffer;
#endif
/**
* Patch context buffer descriptor struct.
*/
struct patch_desc patch_ctx;
struct zcull_ctx_desc zcull_ctx;
struct pm_ctx_desc pm_ctx;
#ifdef CONFIG_NVGPU_GRAPHICS
struct zcull_ctx_desc zcull_ctx;
#endif
#ifdef CONFIG_NVGPU_DEBUGGER
struct pm_ctx_desc pm_ctx;
#endif
/**
* Graphics preemption mode of the graphics context.
*/
u32 graphics_preempt_mode;
/**
* Compute preemption mode of the graphics context.
*/
u32 compute_preempt_mode;
#ifdef CONFIG_NVGPU_NON_FUSA
bool golden_img_loaded;
#endif
#ifdef CONFIG_NVGPU_CILP
bool cilp_preempt_pending;
#endif
#ifdef CONFIG_NVGPU_DEBUGGER
bool boosted_ctx;
#endif
@@ -87,10 +150,27 @@ struct nvgpu_gr_ctx {
u64 virt_ctx;
#endif
/**
* Array to store GPU virtual addresses of all global context
* buffers.
*/
u64 global_ctx_buffer_va[NVGPU_GR_CTX_VA_COUNT];
/**
* Array to store indexes of global context buffers
* corresponding to GPU virtual addresses above.
*/
u32 global_ctx_buffer_index[NVGPU_GR_CTX_VA_COUNT];
/**
* Flag to indicate if global context buffers are mapped and
* #global_ctx_buffer_va array is populated.
*/
bool global_ctx_buffer_mapped;
/**
* TSG identifier corresponding to the graphics context.
*/
u32 tsgid;
};

31
drivers/gpu/nvgpu/common/gr/global_ctx_priv.h
View File

@@ -23,14 +23,45 @@
#ifndef NVGPU_GR_GLOBAL_CTX_PRIV_H
#define NVGPU_GR_GLOBAL_CTX_PRIV_H
/**
* Global context buffer descriptor structure.
*
* This structure stores properties applicable to each global
* context buffer.
*/
struct nvgpu_gr_global_ctx_buffer_desc {
/**
* Memory to hold global context buffer.
*/
struct nvgpu_mem mem;
/**
* Size of global context buffer.
*/
size_t size;
/**
* Function pointer to free global context buffer.
*/
global_ctx_mem_destroy_fn destroy;
};
/**
* Local Golden context image descriptor structure.
*
* This structure stores details of a local Golden context image.
* Pointer to this struct is maintained in
* #nvgpu_gr_obj_ctx_golden_image structure.
*/
struct nvgpu_gr_global_ctx_local_golden_image {
/**
* Pointer to local Golden context image memory.
*/
u32 *context;
/**
* Size of local Golden context image.
*/
size_t size;
};

18
drivers/gpu/nvgpu/common/gr/obj_ctx_priv.h
View File

@@ -28,12 +28,30 @@
struct nvgpu_gr_global_ctx_local_golden_image;
/**
* Golden context image descriptor structure.
*
* This structure stores details of the Golden context image.
*/
struct nvgpu_gr_obj_ctx_golden_image {
/**
* Flag to indicate if Golden context image is ready or not.
*/
bool ready;
/**
* Mutex to hold for accesses to Golden context image.
*/
struct nvgpu_mutex ctx_mutex;
/**
* Size of Golden context image.
*/
size_t size;
/**
* Pointer to local Golden context image struct.
*/
struct nvgpu_gr_global_ctx_local_golden_image *local_golden_image;
};

8
drivers/gpu/nvgpu/common/gr/subctx_priv.h
View File

@@ -25,7 +25,15 @@
struct nvgpu_mem;
/**
* GR subcontext data structure.
*
* One subcontext is allocated per GPU channel.
*/
struct nvgpu_gr_subctx {
/**
* Memory to hold subcontext header image.
*/
struct nvgpu_mem ctx_header;
};