gpu: nvpgu: setup fecs_trace hal operations

bug 1648908

Change-Id: I630f74f09e0a4143f5028c88634b9793ec86b279
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: http://git-master/r/1022730
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

drivers/gpu/nvgpu/Makefile

@@ -16,6 +16,7 @@ nvgpu-y += \
 	$(nvgpu-t18x)/gp10b/regops_gp10b.o \
 	$(nvgpu-t18x)/gp10b/cde_gp10b.o \
 	$(nvgpu-t18x)/gp10b/therm_gp10b.o \
+	$(nvgpu-t18x)/gp10b/fecs_trace_gp10b.o \
 	$(nvgpu-t18x)/gp10b/gp10b_sysfs.o
 
 nvgpu-$(CONFIG_TEGRA_GK20A) += $(nvgpu-t18x)/gp10b/platform_gp10b_tegra.o

drivers/gpu/nvgpu/gp10b/fecs_trace_gp10b.c

@@ -0,0 +1,53 @@
+/*
+ * GP10B GPU FECS traces
+ *
+ * Copyright (c) 2016, NVIDIA CORPORATION.  All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ */
+
+#include "gk20a/gk20a.h"
+#include "gk20a/fecs_trace_gk20a.h"
+#include "gp10b/hw_ctxsw_prog_gp10b.h"
+#include "gp10b/hw_gr_gp10b.h"
+
+#ifdef CONFIG_GK20A_CTXSW_TRACE
+static int gp10b_fecs_trace_flush(struct gk20a *g)
+{
+	struct fecs_method_op_gk20a op = {
+		.mailbox = { .id = 0, .data = 0,
+			.clr = ~0, .ok = 0, .fail = 0},
+		.method.addr = gr_fecs_method_push_adr_write_timestamp_record_v(),
+		.method.data = 0,
+		.cond.ok = GR_IS_UCODE_OP_NOT_EQUAL,
+		.cond.fail = GR_IS_UCODE_OP_SKIP,
+	};
+	int err;
+
+	gk20a_dbg(gpu_dbg_fn|gpu_dbg_ctxsw, "");
+
+	err = gr_gk20a_elpg_protected_call(g,
+			gr_gk20a_submit_fecs_method_op(g, op, false));
+	if (err)
+		gk20a_err(dev_from_gk20a(g), "write timestamp record failed");
+
+	return err;
+}
+
+void gp10b_init_fecs_trace_ops(struct gpu_ops *ops)
+{
+	gk20a_init_fecs_trace_ops(ops);
+	ops->fecs_trace.flush = gp10b_fecs_trace_flush;
+}
+#else
+void gp10b_init_fecs_trace_ops(struct gpu_ops *ops)
+{
+}
+#endif /* CONFIG_GK20A_CTXSW_TRACE */

drivers/gpu/nvgpu/gp10b/fecs_trace_gp10b.h

@@ -0,0 +1,23 @@
+/*
+ * GP10B GPU FECS traces
+ *
+ * Copyright (c) 2016, NVIDIA CORPORATION.  All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ */
+
+#ifndef _NVGPU_FECS_TRACE_GP10B_H_
+#define _NVGPU_FECS_TRACE_GP10B_H_
+
+struct gpu_ops;
+
+int gp10b_init_fecs_trace_ops(struct gpu_ops *);
+
+#endif

drivers/gpu/nvgpu/gp10b/gr_gp10b.c

@@ -902,6 +902,23 @@ static void dump_ctx_switch_stats(struct gk20a *g, struct vm_gk20a *vm,
 		WARN_ON("Cannot map context");
 		return;
 	}
+	gk20a_err(dev_from_gk20a(g), "ctxsw_prog_main_image_magic_value_o : %x (expect %x)\n",
+		gk20a_mem_rd32(ctx_ptr +
+				ctxsw_prog_main_image_magic_value_o(), 0),
+		ctxsw_prog_main_image_magic_value_v_value_v());
+
+	gk20a_err(dev_from_gk20a(g), "ctxsw_prog_main_image_context_timestamp_buffer_ptr_hi : %x\n",
+		gk20a_mem_rd32(ctx_ptr +
+				ctxsw_prog_main_image_context_timestamp_buffer_ptr_hi_o(), 0));
+
+	gk20a_err(dev_from_gk20a(g), "ctxsw_prog_main_image_context_timestamp_buffer_ptr : %x\n",
+		gk20a_mem_rd32(ctx_ptr +
+				ctxsw_prog_main_image_context_timestamp_buffer_ptr_o(), 0));
+
+	gk20a_err(dev_from_gk20a(g), "ctxsw_prog_main_image_context_timestamp_buffer_control : %x\n",
+		gk20a_mem_rd32(ctx_ptr +
+				ctxsw_prog_main_image_context_timestamp_buffer_control_o(), 0));
+
 	gk20a_err(dev_from_gk20a(g), "NUM_SAVE_OPERATIONS : %d\n",
 		gk20a_mem_rd32(ctx_ptr +
 			ctxsw_prog_main_image_num_save_ops_o(), 0));

drivers/gpu/nvgpu/gp10b/hal_gp10b.c

@@ -21,6 +21,7 @@
 #include "gk20a/gk20a.h"
 
 #include "gp10b/gr_gp10b.h"
+#include "gp10b/fecs_trace_gp10b.h"
 #include "gp10b/mc_gp10b.h"
 #include "gp10b/ltc_gp10b.h"
 #include "gp10b/mm_gp10b.h"
@@ -139,6 +140,7 @@ int gp10b_init_hal(struct gk20a *g)
 
 	gp10b_init_mc(gops);
 	gp10b_init_gr(gops);
+	gp10b_init_fecs_trace_ops(gops);
 	gp10b_init_ltc(gops);
 	gp10b_init_fb(gops);
 	gp10b_init_fifo(gops);

drivers/gpu/nvgpu/gp10b/hw_ctxsw_prog_gp10b.h

@@ -62,6 +62,10 @@ static inline u32 ctxsw_prog_main_image_patch_count_o(void)
 {
 	return 0x00000010;
 }
+static inline u32 ctxsw_prog_main_image_context_id_o(void)
+{
+	return 0x000000f0;
+}
 static inline u32 ctxsw_prog_main_image_patch_adr_lo_o(void)
 {
 	return 0x00000014;
@@ -286,8 +290,184 @@ static inline u32 ctxsw_prog_main_image_compute_preemption_options_control_cilp_
 {
 	return 0x2;
 }
-static inline u32 ctxsw_prog_main_image_context_id_o(void)
+static inline u32 ctxsw_prog_main_image_context_timestamp_buffer_control_o(void)
 {
-	return 0x000000f0;
+	return 0x000000ac;
+}
+static inline u32 ctxsw_prog_main_image_context_timestamp_buffer_control_num_records_f(u32 v)
+{
+	return (v & 0xffff) << 0;
+}
+static inline u32 ctxsw_prog_main_image_context_timestamp_buffer_ptr_hi_o(void)
+{
+	return 0x000000b0;
+}
+static inline u32 ctxsw_prog_main_image_context_timestamp_buffer_ptr_hi_v_m(void)
+{
+	return 0xfffffff << 0;
+}
+static inline u32 ctxsw_prog_main_image_context_timestamp_buffer_ptr_hi_target_m(void)
+{
+	return 0x3 << 28;
+}
+static inline u32 ctxsw_prog_main_image_context_timestamp_buffer_ptr_hi_target_vid_mem_f(void)
+{
+	return 0x0;
+}
+static inline u32 ctxsw_prog_main_image_context_timestamp_buffer_ptr_hi_target_sys_mem_coherent_f(void)
+{
+	return 0x20000000;
+}
+static inline u32 ctxsw_prog_main_image_context_timestamp_buffer_ptr_hi_target_sys_mem_noncoherent_f(void)
+{
+	return 0x30000000;
+}
+static inline u32 ctxsw_prog_main_image_context_timestamp_buffer_ptr_o(void)
+{
+	return 0x000000b4;
+}
+static inline u32 ctxsw_prog_main_image_context_timestamp_buffer_ptr_v_f(u32 v)
+{
+	return (v & 0xffffffff) << 0;
+}
+static inline u32 ctxsw_prog_record_timestamp_record_size_in_bytes_v(void)
+{
+	return 0x00000080;
+}
+static inline u32 ctxsw_prog_record_timestamp_record_size_in_words_v(void)
+{
+	return 0x00000020;
+}
+static inline u32 ctxsw_prog_record_timestamp_magic_value_lo_o(void)
+{
+	return 0x00000000;
+}
+static inline u32 ctxsw_prog_record_timestamp_magic_value_lo_v_value_v(void)
+{
+	return 0x00000000;
+}
+static inline u32 ctxsw_prog_record_timestamp_magic_value_hi_o(void)
+{
+	return 0x00000004;
+}
+static inline u32 ctxsw_prog_record_timestamp_magic_value_hi_v_value_v(void)
+{
+	return 0x600dbeef;
+}
+static inline u32 ctxsw_prog_record_timestamp_context_id_o(void)
+{
+	return 0x00000008;
+}
+static inline u32 ctxsw_prog_record_timestamp_context_ptr_o(void)
+{
+	return 0x0000000c;
+}
+static inline u32 ctxsw_prog_record_timestamp_timestamp_lo_o(void)
+{
+	return 0x00000018;
+}
+static inline u32 ctxsw_prog_record_timestamp_timestamp_hi_o(void)
+{
+	return 0x0000001c;
+}
+static inline u32 ctxsw_prog_record_timestamp_timestamp_hi_v_f(u32 v)
+{
+	return (v & 0xffffff) << 0;
+}
+static inline u32 ctxsw_prog_record_timestamp_timestamp_hi_v_v(u32 r)
+{
+	return (r >> 0) & 0xffffff;
+}
+static inline u32 ctxsw_prog_record_timestamp_timestamp_hi_tag_f(u32 v)
+{
+	return (v & 0xff) << 24;
+}
+static inline u32 ctxsw_prog_record_timestamp_timestamp_hi_tag_m(void)
+{
+	return 0xff << 24;
+}
+static inline u32 ctxsw_prog_record_timestamp_timestamp_hi_tag_v(u32 r)
+{
+	return (r >> 24) & 0xff;
+}
+static inline u32 ctxsw_prog_record_timestamp_timestamp_hi_tag_ctxsw_req_by_host_v(void)
+{
+	return 0x00000001;
+}
+static inline u32 ctxsw_prog_record_timestamp_timestamp_hi_tag_ctxsw_req_by_host_f(void)
+{
+	return 0x1000000;
+}
+static inline u32 ctxsw_prog_record_timestamp_timestamp_hi_tag_fe_ack_v(void)
+{
+	return 0x00000002;
+}
+static inline u32 ctxsw_prog_record_timestamp_timestamp_hi_tag_fe_ack_f(void)
+{
+	return 0x2000000;
+}
+static inline u32 ctxsw_prog_record_timestamp_timestamp_hi_tag_fe_ack_wfi_v(void)
+{
+	return 0x0000000a;
+}
+static inline u32 ctxsw_prog_record_timestamp_timestamp_hi_tag_fe_ack_wfi_f(void)
+{
+	return 0xa000000;
+}
+static inline u32 ctxsw_prog_record_timestamp_timestamp_hi_tag_fe_ack_gfxp_v(void)
+{
+	return 0x0000000b;
+}
+static inline u32 ctxsw_prog_record_timestamp_timestamp_hi_tag_fe_ack_gfxp_f(void)
+{
+	return 0xb000000;
+}
+static inline u32 ctxsw_prog_record_timestamp_timestamp_hi_tag_fe_ack_ctap_v(void)
+{
+	return 0x0000000c;
+}
+static inline u32 ctxsw_prog_record_timestamp_timestamp_hi_tag_fe_ack_ctap_f(void)
+{
+	return 0xc000000;
+}
+static inline u32 ctxsw_prog_record_timestamp_timestamp_hi_tag_fe_ack_cilp_v(void)
+{
+	return 0x0000000d;
+}
+static inline u32 ctxsw_prog_record_timestamp_timestamp_hi_tag_fe_ack_cilp_f(void)
+{
+	return 0xd000000;
+}
+static inline u32 ctxsw_prog_record_timestamp_timestamp_hi_tag_save_end_v(void)
+{
+	return 0x00000003;
+}
+static inline u32 ctxsw_prog_record_timestamp_timestamp_hi_tag_save_end_f(void)
+{
+	return 0x3000000;
+}
+static inline u32 ctxsw_prog_record_timestamp_timestamp_hi_tag_restore_start_v(void)
+{
+	return 0x00000004;
+}
+static inline u32 ctxsw_prog_record_timestamp_timestamp_hi_tag_restore_start_f(void)
+{
+	return 0x4000000;
+}
+static inline u32 ctxsw_prog_record_timestamp_timestamp_hi_tag_context_start_v(void)
+{
+	return 0x00000005;
+}
+static inline u32 ctxsw_prog_record_timestamp_timestamp_hi_tag_context_start_f(void)
+{
+	return 0x5000000;
+}
+static inline u32 ctxsw_prog_record_timestamp_timestamp_hi_tag_invalid_timestamp_v(void)
+{
+	return 0x000000ff;
+}
+static inline u32 ctxsw_prog_record_timestamp_timestamp_hi_tag_invalid_timestamp_f(void)
+{
+	return 0xff000000;
 }
 #endif

drivers/gpu/nvgpu/gp10b/hw_gr_gp10b.h

@@ -1094,6 +1094,10 @@ static inline u32 gr_fecs_method_push_adr_set_watchdog_timeout_f(void)
 {
 	return 0x21;
 }
+static inline u32 gr_fecs_method_push_adr_write_timestamp_record_v(void)
+{
+	return 0x0000003d;
+}
 static inline u32 gr_fecs_method_push_adr_discover_preemption_image_size_v(void)
 {
 	return 0x0000001a;

drivers/gpu/nvgpu/gp10b/hw_timer_gp10b.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2016, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2014-2016, NVIDIA CORPORATION.  All rights reserved.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,