gpu: nvgpu: Change in pstate s/w setup sequence

pstate s/w setup needs to know offsets of boardobjs present
in PMU super surface to construct boardobj set/get_status
construct.

With SSMD support, boardobj offset will be part of SSMD
lookup table which is part of PMU super surface buffer &
updated by PMU RTOS during init stage.

As SSMD is updated at init stage & SSMD will be ready for nvgpu
to read offsets only when PMU init message is received,
so pstate s/w must wait till PMU is ready to construct
boardobj set/get_status

JIRA NVGPU-1874

Change-Id: I87d840965b92c538f26dbedf458f0c18d1808abc
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2000863
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Mahantesh Kumbar
2019-01-22 14:56:33 +05:30
committed by mobile promotions
parent 7c3c41bfbd
commit f7acf93345
2 changed files with 13 additions and 15 deletions

View File

@@ -321,15 +321,6 @@ int gk20a_finalize_poweron(struct gk20a *g)
}
}
if (nvgpu_is_enabled(g, NVGPU_PMU_PSTATE)) {
err = gk20a_init_pstate_support(g);
if (err != 0) {
nvgpu_err(g, "failed to init pstates");
nvgpu_mutex_release(&g->tpc_pg_lock);
goto done;
}
}
if (g->acr.bootstrap_hs_acr != NULL &&
nvgpu_is_enabled(g, NVGPU_SEC_PRIVSECURITY)) {
err = g->acr.bootstrap_hs_acr(g, &g->acr, &g->acr.acr);
@@ -368,6 +359,13 @@ int gk20a_finalize_poweron(struct gk20a *g)
nvgpu_mutex_release(&g->tpc_pg_lock);
if (nvgpu_is_enabled(g, NVGPU_PMU_PSTATE)) {
err = gk20a_init_pstate_support(g);
if (err != 0) {
nvgpu_err(g, "failed to init pstates");
nvgpu_mutex_release(&g->tpc_pg_lock);
goto done;
}
err = gk20a_init_pstate_pmu_support(g);
if (err != 0) {
nvgpu_err(g, "failed to init pstates");