diff --git a/drivers/gpu/nvgpu/gk20a/fence_gk20a.c b/drivers/gpu/nvgpu/gk20a/fence_gk20a.c
index 7759a6c9a..761e7b91f 100644
--- a/drivers/gpu/nvgpu/gk20a/fence_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/fence_gk20a.c
@@ -300,8 +300,9 @@ int gk20a_fence_from_syncpt(
 	struct gk20a_fence *f = fence_out;
 
 	gk20a_init_fence(f, &gk20a_syncpt_fence_ops, os_fence);
-	if (!f)
+	if (!f) {
 		return -EINVAL;
+	}
 
 	f->nvhost_dev = nvhost_dev;
 	f->syncpt_id = id;
diff --git a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c
index 25b793f98..630123f0a 100644
--- a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c
@@ -3016,13 +3016,14 @@ void gk20a_dump_channel_status_ramfc(struct gk20a *g,
 #ifdef CONFIG_TEGRA_GK20A_NVHOST
 	if ((pbdma_syncpointb_op_v(syncpointb) == pbdma_syncpointb_op_wait_v())
 		&& (pbdma_syncpointb_wait_switch_v(syncpointb) ==
-			pbdma_syncpointb_wait_switch_en_v()))
+			pbdma_syncpointb_wait_switch_en_v())) {
 		gk20a_debug_output(o, "%s on syncpt %u (%s) val %u",
 			(status == 3 || status == 8) ? "Waiting" : "Waited",
 			pbdma_syncpointb_syncpt_index_v(syncpointb),
 			nvgpu_nvhost_syncpt_get_name(g->nvhost_dev,
 				pbdma_syncpointb_syncpt_index_v(syncpointb)),
 			pbdma_syncpointa_payload_v(syncpointa));
+	}
 #endif
 
 	gk20a_debug_output(o, " ");
diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
index cc5172e08..02513bdfb 100644
--- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
@@ -4681,8 +4681,9 @@ static inline bool is_valid_cyclestats_bar0_offset_gk20a(struct gk20a *g,
 	/* support only 24-bit 4-byte aligned offsets */
 	bool valid = !(offset & 0xFF000003U);
 
-	if (g->allow_all)
+	if (g->allow_all) {
 		return true;
+	}
 
 	/* whitelist check */
 	valid = valid &&
@@ -4711,8 +4712,10 @@ int gk20a_gr_handle_notify_pending(struct gk20a *g,
 
 #if defined(CONFIG_GK20A_CYCLE_STATS)
 	/* GL will never use payload 0 for cycle state */
-	if ((ch->cyclestate.cyclestate_buffer == NULL) || (isr_data->data_lo == 0))
+	if ((ch->cyclestate.cyclestate_buffer == NULL) ||
+	    (isr_data->data_lo == 0)) {
 		return 0;
+	}
 
 	nvgpu_mutex_acquire(&ch->cyclestate.cyclestate_buffer_mutex);