From f9e33430eda0ba5d4e72be642760706d4d2305a4 Mon Sep 17 00:00:00 2001 From: Sagar Kamble Date: Tue, 1 Oct 2019 20:24:28 +0530 Subject: [PATCH] gpu: nvgpu: fix MISRA rule 8.6 violation nvgpu_channel_sync_wait_syncpt is not defined in safety build with the removal of KMD submit. However, it's declaration was not compiled out. Fix it. JIRA NVGPU-3873 Change-Id: Ib2dea5172d53da58c5a16be90bd6f8204bd15572 Signed-off-by: Sagar Kamble Reviewed-on: https://git-master.nvidia.com/r/2209498 Reviewed-by: Philip Elcan Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Adeel Raza Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/include/nvgpu/channel_sync_syncpt.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpu/nvgpu/include/nvgpu/channel_sync_syncpt.h b/drivers/gpu/nvgpu/include/nvgpu/channel_sync_syncpt.h index d19bc69a9..2c99444d6 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/channel_sync_syncpt.h +++ b/drivers/gpu/nvgpu/include/nvgpu/channel_sync_syncpt.h @@ -49,12 +49,14 @@ u32 nvgpu_channel_sync_get_syncpt_id(struct nvgpu_channel_sync_syncpt *s); */ u64 nvgpu_channel_sync_get_syncpt_address(struct nvgpu_channel_sync_syncpt *s); +#ifdef CONFIG_NVGPU_KERNEL_MODE_SUBMIT /* * Generate a gpu wait cmdbuf from raw fence(can be syncpoints or semaphores). * Returns a gpu cmdbuf that performs the wait when executed. */ int nvgpu_channel_sync_wait_syncpt(struct nvgpu_channel_sync_syncpt *s, u32 id, u32 thresh, struct priv_cmd_entry *entry); +#endif /* * Converts a valid struct nvgpu_channel_sync ptr to