diff --git a/drivers/gpu/nvgpu/os/linux/module.c b/drivers/gpu/nvgpu/os/linux/module.c index f52976493..0b33fc833 100644 --- a/drivers/gpu/nvgpu/os/linux/module.c +++ b/drivers/gpu/nvgpu/os/linux/module.c @@ -854,6 +854,7 @@ fail_timeout: return -EBUSY; } +#ifdef CONFIG_NVGPU_VPR /** * gk20a_do_idle() - wrap up for gk20a_do_idle_impl() to be called * from outside of GPU driver @@ -866,6 +867,7 @@ static int gk20a_do_idle(void *_g) return gk20a_do_idle_impl(g, true); } +#endif /** * gk20a_do_unidle_impl() - unblock all the tasks blocked by @@ -905,6 +907,7 @@ int gk20a_do_unidle_impl(struct gk20a *g) return 0; } +#ifdef CONFIG_NVGPU_VPR /** * gk20a_do_unidle() - wrap up for gk20a_do_unidle_impl() */ @@ -915,6 +918,7 @@ static int gk20a_do_unidle(void *_g) return gk20a_do_unidle_impl(g); } #endif +#endif void __iomem *nvgpu_devm_ioremap_resource(struct platform_device *dev, int i, struct resource **out) @@ -970,7 +974,9 @@ void gk20a_remove_support(struct gk20a *g) struct nvgpu_os_linux *l = nvgpu_os_linux_from_gk20a(g); struct sim_nvgpu_linux *sim_linux; +#ifdef CONFIG_NVGPU_VPR tegra_unregister_idle_unidle(gk20a_do_idle); +#endif #ifdef CONFIG_NVGPU_DEBUGGER nvgpu_kfree(g, g->dbg_regops_tmp_buf); @@ -1023,7 +1029,9 @@ static int gk20a_init_support(struct platform_device *pdev) struct nvgpu_os_linux *l = nvgpu_os_linux_from_gk20a(g); int err = -ENOMEM; +#ifdef CONFIG_NVGPU_VPR tegra_register_idle_unidle(gk20a_do_idle, gk20a_do_unidle, g); +#endif l->regs = nvgpu_devm_ioremap_resource(pdev, GK20A_BAR0_IORESOURCE_MEM, diff --git a/drivers/gpu/nvgpu/os/linux/platform_gk20a_tegra.c b/drivers/gpu/nvgpu/os/linux/platform_gk20a_tegra.c index 0ddcef0bb..4028eb195 100644 --- a/drivers/gpu/nvgpu/os/linux/platform_gk20a_tegra.c +++ b/drivers/gpu/nvgpu/os/linux/platform_gk20a_tegra.c @@ -71,7 +71,9 @@ #define GPU_RAIL_NAME "vdd_gpu" #endif +#ifdef CONFIG_NVGPU_VPR extern struct device tegra_vpr_dev; +#endif #ifdef CONFIG_TEGRA_BWMGR struct gk20a_emc_params { @@ -89,6 +91,7 @@ struct gk20a_emc_params { #define MHZ_TO_HZ(x) ((x) * 1000000) #define HZ_TO_MHZ(x) ((x) / 1000000) +#ifdef CONFIG_NVGPU_VPR static void gk20a_tegra_secure_page_destroy(struct gk20a *g, struct secure_page_buffer *secure_buffer) { @@ -153,6 +156,7 @@ fail_sgt: nvgpu_kfree(platform->g, sgt); return err; } +#endif #ifdef CONFIG_TEGRA_BWMGR /* @@ -621,6 +625,7 @@ void gk20a_tegra_idle(struct device *dev) int gk20a_tegra_init_secure_alloc(struct gk20a_platform *platform) { +#ifdef CONFIG_NVGPU_VPR struct gk20a *g = platform->g; struct secure_page_buffer *secure_buffer = &platform->secure_buffer; dma_addr_t iova; @@ -644,7 +649,7 @@ int gk20a_tegra_init_secure_alloc(struct gk20a_platform *platform) g->ops.secure_alloc = gk20a_tegra_secure_alloc; nvgpu_set_enabled(g, NVGPU_SUPPORT_VPR, true); - +#endif return 0; }