gpu: nvgpu: remove blcg_enable/disable

blcg is always enabled by default and there is no need for disabling
this during gr init or gr reset.

Bug 2866010

Change-Id: Iaf17b7fdf05ad04fe435e1a1fda758deedc6484c
Signed-off-by: ddutta <ddutta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2303114
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
ddutta
2020-02-26 16:07:29 +05:30
committed by mobile promotions
parent aaecfae53f
commit fbad02d5e0
4 changed files with 0 additions and 36 deletions

View File

@@ -529,8 +529,6 @@ static int nvgpu_pg_init_task(void *arg)
gk20a_gr_wait_initialized(g);
nvgpu_cg_blcg_enable_no_wait(g);
nvgpu_cg_elcg_enable_no_wait(g);
return 0;

View File

@@ -84,34 +84,6 @@ void nvgpu_cg_elcg_disable_no_wait(struct gk20a *g)
nvgpu_mutex_release(&g->cg_pg_lock);
}
void nvgpu_cg_blcg_disable_no_wait(struct gk20a *g) {
nvgpu_log_fn(g, " ");
if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) {
return;
}
nvgpu_mutex_acquire(&g->cg_pg_lock);
if (g->blcg_enabled) {
nvgpu_cg_set_mode(g, BLCG_MODE, BLCG_RUN);
}
nvgpu_mutex_release(&g->cg_pg_lock);
}
void nvgpu_cg_blcg_enable_no_wait(struct gk20a *g) {
nvgpu_log_fn(g, " ");
if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) {
return;
}
nvgpu_mutex_acquire(&g->cg_pg_lock);
if (g->blcg_enabled) {
nvgpu_cg_set_mode(g, BLCG_MODE, BLCG_AUTO);
}
nvgpu_mutex_release(&g->cg_pg_lock);
}
void nvgpu_cg_elcg_enable(struct gk20a *g)
{
nvgpu_log_fn(g, " ");

View File

@@ -4694,9 +4694,6 @@ static int gk20a_init_gr_prepare(struct gk20a *g)
/* Disable elcg until it gets enabled later in the init*/
nvgpu_cg_elcg_disable_no_wait(g);
/* Disable blcg until it gets enabled later in the init*/
nvgpu_cg_blcg_disable_no_wait(g);
/* enable fifo access */
gk20a_writel(g, gr_gpfifo_ctl_r(),
gr_gpfifo_ctl_access_enabled_f() |
@@ -5163,7 +5160,6 @@ int gk20a_gr_reset(struct gk20a *g)
nvgpu_cg_init_gr_load_gating_prod(g);
nvgpu_cg_elcg_enable_no_wait(g);
nvgpu_cg_blcg_enable_no_wait(g);
/* GR is inialized, signal possible waiters */
g->gr.initialized = true;

View File

@@ -35,8 +35,6 @@ void nvgpu_cg_elcg_disable(struct gk20a *g);
void nvgpu_cg_elcg_enable_no_wait(struct gk20a *g);
void nvgpu_cg_elcg_disable_no_wait(struct gk20a *g);
void nvgpu_cg_elcg_set_elcg_enabled(struct gk20a *g, bool enable);
void nvgpu_cg_blcg_disable_no_wait(struct gk20a *g);
void nvgpu_cg_blcg_enable_no_wait(struct gk20a *g);
void nvgpu_cg_blcg_mode_enable(struct gk20a *g);
void nvgpu_cg_blcg_mode_disable(struct gk20a *g);