diff --git a/drivers/gpu/nvgpu/Makefile b/drivers/gpu/nvgpu/Makefile index 8f8f8dc86..599e97e2d 100644 --- a/drivers/gpu/nvgpu/Makefile +++ b/drivers/gpu/nvgpu/Makefile @@ -29,6 +29,7 @@ nvgpu-y := \ common/linux/ioctl_channel.o \ common/linux/ioctl_tsg.o \ common/linux/ioctl_dbg.o \ + common/linux/ioctl_clk_arb.o \ common/linux/log.o \ common/linux/cond.o \ common/linux/nvgpu_mem.o \ @@ -282,8 +283,7 @@ nvgpu-y += \ clk/clk_domain.o \ clk/clk_prog.o \ clk/clk_vf_point.o \ - common/linux/ioctl_clk_arb.o \ - common/linux/clk_arb.o \ + clk/clk_arb.o \ clk/clk_freq_controller.o \ perf/vfe_var.o \ perf/vfe_equ.o \ diff --git a/drivers/gpu/nvgpu/common/linux/clk_arb.c b/drivers/gpu/nvgpu/clk/clk_arb.c similarity index 96% rename from drivers/gpu/nvgpu/common/linux/clk_arb.c rename to drivers/gpu/nvgpu/clk/clk_arb.c index 2a6278e80..fdf174083 100644 --- a/drivers/gpu/nvgpu/common/linux/clk_arb.c +++ b/drivers/gpu/nvgpu/clk/clk_arb.c @@ -1,17 +1,23 @@ /* - * Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved. * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. */ #include @@ -28,7 +34,6 @@ #include "gk20a/gk20a.h" #include "clk/clk.h" -#include "clk_arb_linux.h" #include "pstate/pstate.h" #include "lpwr/lpwr.h" #include "volt/volt.h" @@ -1198,7 +1203,7 @@ void nvgpu_clk_arb_worker_enqueue(struct gk20a *g, /** * Initialize the clk arb worker's metadata and start the background thread. */ -int nvgpu_clk_arb_worker_init(struct gk20a *g) +static int nvgpu_clk_arb_worker_init(struct gk20a *g) { int err; @@ -1380,7 +1385,7 @@ void nvgpu_clk_arb_schedule_alarm(struct gk20a *g, u32 alarm) nvgpu_clk_arb_worker_enqueue(g, &arb->update_arb_work_item); } -void nvgpu_clk_arb_worker_deinit(struct gk20a *g) +static void nvgpu_clk_arb_worker_deinit(struct gk20a *g) { nvgpu_mutex_acquire(&g->clk_arb_worker.start_lock); nvgpu_thread_stop(&g->clk_arb_worker.poll_task); diff --git a/drivers/gpu/nvgpu/common/linux/clk_arb_linux.h b/drivers/gpu/nvgpu/common/linux/clk_arb_linux.h deleted file mode 100644 index 464590d58..000000000 --- a/drivers/gpu/nvgpu/common/linux/clk_arb_linux.h +++ /dev/null @@ -1,163 +0,0 @@ -/* - * Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved. - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#ifndef __NVGPU_CLK_ARB_LINUX_H__ -#define __NVGPU_CLK_ARB_LINUX_H__ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include "gk20a/gk20a.h" -#include "clk/clk.h" -#include "pstate/pstate.h" -#include "lpwr/lpwr.h" -#include "volt/volt.h" - -/* - * The defines here should finally move to clk_arb.h, once these are - * refactored to be free of Linux fields. - */ - -enum clk_arb_work_item_type { - CLK_ARB_WORK_UPDATE_VF_TABLE, - CLK_ARB_WORK_UPDATE_ARB -}; - -struct nvgpu_clk_arb_work_item { - enum clk_arb_work_item_type item_type; - struct nvgpu_clk_arb *arb; - struct nvgpu_list_node worker_item; -}; - -struct nvgpu_clk_arb { - struct nvgpu_spinlock sessions_lock; - struct nvgpu_spinlock users_lock; - struct nvgpu_spinlock requests_lock; - - struct nvgpu_mutex pstate_lock; - struct nvgpu_list_node users; - struct nvgpu_list_node sessions; - struct nvgpu_list_node requests; - - struct gk20a *g; - int status; - - struct nvgpu_clk_arb_target actual_pool[2]; - struct nvgpu_clk_arb_target *actual; - - u16 gpc2clk_default_mhz; - u16 mclk_default_mhz; - u32 voltuv_actual; - - u16 gpc2clk_min, gpc2clk_max; - u16 mclk_min, mclk_max; - - struct nvgpu_clk_arb_work_item update_vf_table_work_item; - struct nvgpu_clk_arb_work_item update_arb_work_item; - - struct nvgpu_cond request_wq; - - struct nvgpu_clk_vf_table *current_vf_table; - struct nvgpu_clk_vf_table vf_table_pool[2]; - u32 vf_table_index; - - u16 *mclk_f_points; - nvgpu_atomic_t req_nr; - - u32 mclk_f_numpoints; - u16 *gpc2clk_f_points; - u32 gpc2clk_f_numpoints; - - nvgpu_atomic64_t alarm_mask; - struct nvgpu_clk_notification_queue notification_queue; - -#ifdef CONFIG_DEBUG_FS - struct nvgpu_clk_arb_debug debug_pool[2]; - struct nvgpu_clk_arb_debug *debug; - bool debugfs_set; -#endif -}; - -struct nvgpu_clk_dev { - struct nvgpu_clk_session *session; - union { - struct nvgpu_list_node link; - struct nvgpu_list_node node; - }; - struct nvgpu_cond readout_wq; - nvgpu_atomic_t poll_mask; - u16 gpc2clk_target_mhz; - u16 mclk_target_mhz; - u32 alarms_reported; - nvgpu_atomic_t enabled_mask; - struct nvgpu_clk_notification_queue queue; - u32 arb_queue_head; - struct nvgpu_ref refcount; -}; - -struct nvgpu_clk_session { - bool zombie; - struct gk20a *g; - struct nvgpu_ref refcount; - struct nvgpu_list_node link; - struct nvgpu_list_node targets; - - struct nvgpu_spinlock session_lock; - struct nvgpu_clk_arb_target target_pool[2]; - struct nvgpu_clk_arb_target *target; -}; - -static inline struct nvgpu_clk_session * -nvgpu_clk_session_from_link(struct nvgpu_list_node *node) -{ - return (struct nvgpu_clk_session *) - ((uintptr_t)node - offsetof(struct nvgpu_clk_session, link)); -}; - -static inline struct nvgpu_clk_dev * -nvgpu_clk_dev_from_node(struct nvgpu_list_node *node) -{ - return (struct nvgpu_clk_dev *) - ((uintptr_t)node - offsetof(struct nvgpu_clk_dev, node)); -}; - -static inline struct nvgpu_clk_dev * -nvgpu_clk_dev_from_link(struct nvgpu_list_node *node) -{ - return (struct nvgpu_clk_dev *) - ((uintptr_t)node - offsetof(struct nvgpu_clk_dev, link)); -}; - -static inline struct nvgpu_clk_arb_work_item * -nvgpu_clk_arb_work_item_from_worker_item(struct nvgpu_list_node *node) -{ - return (struct nvgpu_clk_arb_work_item *) - ((uintptr_t)node - offsetof(struct nvgpu_clk_arb_work_item, worker_item)); -}; - -void nvgpu_clk_arb_worker_enqueue(struct gk20a *g, - struct nvgpu_clk_arb_work_item *work_item); -#endif /* __NVGPU_CLK_ARB_LINUX_H__ */ - diff --git a/drivers/gpu/nvgpu/common/linux/ioctl_clk_arb.c b/drivers/gpu/nvgpu/common/linux/ioctl_clk_arb.c index 3ab8cf9ee..e4ac68a3e 100644 --- a/drivers/gpu/nvgpu/common/linux/ioctl_clk_arb.c +++ b/drivers/gpu/nvgpu/common/linux/ioctl_clk_arb.c @@ -38,7 +38,6 @@ #include "gk20a/gk20a.h" #include "clk/clk.h" -#include "clk_arb_linux.h" #include "pstate/pstate.h" #include "lpwr/lpwr.h" #include "volt/volt.h" diff --git a/drivers/gpu/nvgpu/include/nvgpu/clk_arb.h b/drivers/gpu/nvgpu/include/nvgpu/clk_arb.h index a5f8a7d50..c9a32cf16 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/clk_arb.h +++ b/drivers/gpu/nvgpu/include/nvgpu/clk_arb.h @@ -151,6 +151,126 @@ struct nvgpu_clk_arb_target { u32 pstate; }; +enum clk_arb_work_item_type { + CLK_ARB_WORK_UPDATE_VF_TABLE, + CLK_ARB_WORK_UPDATE_ARB +}; + +struct nvgpu_clk_arb_work_item { + enum clk_arb_work_item_type item_type; + struct nvgpu_clk_arb *arb; + struct nvgpu_list_node worker_item; +}; + +struct nvgpu_clk_arb { + struct nvgpu_spinlock sessions_lock; + struct nvgpu_spinlock users_lock; + struct nvgpu_spinlock requests_lock; + + struct nvgpu_mutex pstate_lock; + struct nvgpu_list_node users; + struct nvgpu_list_node sessions; + struct nvgpu_list_node requests; + + struct gk20a *g; + int status; + + struct nvgpu_clk_arb_target actual_pool[2]; + struct nvgpu_clk_arb_target *actual; + + u16 gpc2clk_default_mhz; + u16 mclk_default_mhz; + u32 voltuv_actual; + + u16 gpc2clk_min, gpc2clk_max; + u16 mclk_min, mclk_max; + + struct nvgpu_clk_arb_work_item update_vf_table_work_item; + struct nvgpu_clk_arb_work_item update_arb_work_item; + + struct nvgpu_cond request_wq; + + struct nvgpu_clk_vf_table *current_vf_table; + struct nvgpu_clk_vf_table vf_table_pool[2]; + u32 vf_table_index; + + u16 *mclk_f_points; + nvgpu_atomic_t req_nr; + + u32 mclk_f_numpoints; + u16 *gpc2clk_f_points; + u32 gpc2clk_f_numpoints; + + nvgpu_atomic64_t alarm_mask; + struct nvgpu_clk_notification_queue notification_queue; + +#ifdef CONFIG_DEBUG_FS + struct nvgpu_clk_arb_debug debug_pool[2]; + struct nvgpu_clk_arb_debug *debug; + bool debugfs_set; +#endif +}; + +struct nvgpu_clk_dev { + struct nvgpu_clk_session *session; + union { + struct nvgpu_list_node link; + struct nvgpu_list_node node; + }; + struct nvgpu_cond readout_wq; + nvgpu_atomic_t poll_mask; + u16 gpc2clk_target_mhz; + u16 mclk_target_mhz; + u32 alarms_reported; + nvgpu_atomic_t enabled_mask; + struct nvgpu_clk_notification_queue queue; + u32 arb_queue_head; + struct nvgpu_ref refcount; +}; + +struct nvgpu_clk_session { + bool zombie; + struct gk20a *g; + struct nvgpu_ref refcount; + struct nvgpu_list_node link; + struct nvgpu_list_node targets; + + struct nvgpu_spinlock session_lock; + struct nvgpu_clk_arb_target target_pool[2]; + struct nvgpu_clk_arb_target *target; +}; + +static inline struct nvgpu_clk_session * +nvgpu_clk_session_from_link(struct nvgpu_list_node *node) +{ + return (struct nvgpu_clk_session *) + ((uintptr_t)node - offsetof(struct nvgpu_clk_session, link)); +}; + +static inline struct nvgpu_clk_dev * +nvgpu_clk_dev_from_node(struct nvgpu_list_node *node) +{ + return (struct nvgpu_clk_dev *) + ((uintptr_t)node - offsetof(struct nvgpu_clk_dev, node)); +}; + +static inline struct nvgpu_clk_dev * +nvgpu_clk_dev_from_link(struct nvgpu_list_node *node) +{ + return (struct nvgpu_clk_dev *) + ((uintptr_t)node - offsetof(struct nvgpu_clk_dev, link)); +}; + +static inline struct nvgpu_clk_arb_work_item * +nvgpu_clk_arb_work_item_from_worker_item(struct nvgpu_list_node *node) +{ + return (struct nvgpu_clk_arb_work_item *) + ((uintptr_t)node - offsetof(struct nvgpu_clk_arb_work_item, worker_item)); +}; + +void nvgpu_clk_arb_worker_enqueue(struct gk20a *g, + struct nvgpu_clk_arb_work_item *work_item); + int nvgpu_clk_arb_init_arbiter(struct gk20a *g); int nvgpu_clk_arb_get_arbiter_clk_range(struct gk20a *g, u32 api_domain,