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gpu: nvgpu: compile out NON FUSA IO APIs

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Patch removes declarations for IO NON FUSA APIs.

Jira NVGPU-6238

Change-Id: Iea52d6c0a54b65bebe92b6abfeb8e585963631d0
Signed-off-by: Prateek sethi <prsethi@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2451361
(cherry picked from commit 66446f0ce2d9b65e48201400ca09eaa625026384)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2460379
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: Rajesh Devaraj <rdevaraj@nvidia.com>
Reviewed-by: Vaibhav Kachore <vkachore@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Prateek sethi
2020-11-26 14:57:21 +05:30
committed by Alex Waterman
parent 9a618aaef3
commit fe3e6a00b5
2 changed files with 8 additions and 0 deletions
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4
drivers/gpu/nvgpu/include/nvgpu/io.h
View File

@@ -55,6 +55,7 @@ struct gk20a;
*/
void nvgpu_writel(struct gk20a *g, u32 r, u32 v);
#ifdef CONFIG_NVGPU_DGPU
/**
* @brief Write a value to GPU register without an ordering constraint.
*
@@ -69,6 +70,7 @@ void nvgpu_writel(struct gk20a *g, u32 r, u32 v);
* @return None.
*/
void nvgpu_writel_relaxed(struct gk20a *g, u32 r, u32 v);
#endif
/**
* @brief Read a value from a GPU register.
@@ -112,6 +114,7 @@ u32 nvgpu_readl_impl(struct gk20a *g, u32 r);
*/
void nvgpu_writel_check(struct gk20a *g, u32 r, u32 v);
#ifdef CONFIG_NVGPU_NON_FUSA
/**
* @brief Ensure write to a GPU register.
*
@@ -125,6 +128,7 @@ void nvgpu_writel_check(struct gk20a *g, u32 r, u32 v);
* @return None.
*/
void nvgpu_writel_loop(struct gk20a *g, u32 r, u32 v);
#endif
/**
* @brief Write a value to an already mapped bar1 io-region.

4
drivers/gpu/nvgpu/os/posix/posix-io.c
View File

@@ -76,10 +76,12 @@ void nvgpu_writel(struct gk20a *g, u32 r, u32 v)
callbacks->writel(g, &access);
}
#ifdef CONFIG_NVGPU_DGPU
void nvgpu_writel_relaxed(struct gk20a *g, u32 r, u32 v)
{
nvgpu_writel(g, r, v);
}
#endif
u32 nvgpu_readl(struct gk20a *g, u32 r)
{
@@ -107,10 +109,12 @@ u32 nvgpu_readl(struct gk20a *g, u32 r)
return access.value;
}
#ifdef CONFIG_NVGPU_NON_FUSA
void nvgpu_writel_loop(struct gk20a *g, u32 r, u32 v)
{
BUG();
}
#endif
u32 nvgpu_readl_impl(struct gk20a *g, u32 r)
{