gpu: nvgpu: add cache maintenance timeout override

Add functions to get per-chip cache maintenance timeout overrides.

JIRA: NVGPUGV100-GV100

Change-Id: Ie14efc616e7af52ede60031c789bd2ae70857a6e
Signed-off-by: David Nieto <dmartineznie@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1582768
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
David Nieto
2017-10-20 09:32:55 -07:00
committed by mobile promotions
parent 1cee7b2a39
commit fea32c74dc
3 changed files with 34 additions and 4 deletions

View File

@@ -790,6 +790,7 @@ int gk20a_mm_fb_flush(struct gk20a *g)
u32 data;
int ret = 0;
struct nvgpu_timeout timeout;
u32 retries;
gk20a_dbg_fn("");
@@ -799,7 +800,12 @@ int gk20a_mm_fb_flush(struct gk20a *g)
return 0;
}
nvgpu_timeout_init(g, &timeout, 100, NVGPU_TIMER_RETRY_TIMER);
retries = 100;
if (g->ops.mm.get_flush_retries)
retries = g->ops.mm.get_flush_retries(g, NVGPU_FLUSH_FB);
nvgpu_timeout_init(g, &timeout, retries, NVGPU_TIMER_RETRY_TIMER);
nvgpu_mutex_acquire(&mm->l2_op_lock);
@@ -844,10 +850,14 @@ static void gk20a_mm_l2_invalidate_locked(struct gk20a *g)
{
u32 data;
struct nvgpu_timeout timeout;
u32 retries = 200;
trace_gk20a_mm_l2_invalidate(g->name);
nvgpu_timeout_init(g, &timeout, 200, NVGPU_TIMER_RETRY_TIMER);
if (g->ops.mm.get_flush_retries)
retries = g->ops.mm.get_flush_retries(g, NVGPU_FLUSH_L2_INV);
nvgpu_timeout_init(g, &timeout, retries, NVGPU_TIMER_RETRY_TIMER);
/* Invalidate any clean lines from the L2 so subsequent reads go to
DRAM. Dirty lines are not affected by this operation. */
@@ -891,6 +901,7 @@ void gk20a_mm_l2_flush(struct gk20a *g, bool invalidate)
struct mm_gk20a *mm = &g->mm;
u32 data;
struct nvgpu_timeout timeout;
u32 retries = 2000;
gk20a_dbg_fn("");
@@ -898,7 +909,10 @@ void gk20a_mm_l2_flush(struct gk20a *g, bool invalidate)
if (!g->power_on)
goto hw_was_off;
nvgpu_timeout_init(g, &timeout, 2000, NVGPU_TIMER_RETRY_TIMER);
if (g->ops.mm.get_flush_retries)
retries = g->ops.mm.get_flush_retries(g, NVGPU_FLUSH_L2_FLUSH);
nvgpu_timeout_init(g, &timeout, retries, NVGPU_TIMER_RETRY_TIMER);
nvgpu_mutex_acquire(&mm->l2_op_lock);
@@ -939,6 +953,7 @@ void gk20a_mm_cbc_clean(struct gk20a *g)
struct mm_gk20a *mm = &g->mm;
u32 data;
struct nvgpu_timeout timeout;
u32 retries = 200;
gk20a_dbg_fn("");
@@ -946,7 +961,10 @@ void gk20a_mm_cbc_clean(struct gk20a *g)
if (!g->power_on)
goto hw_was_off;
nvgpu_timeout_init(g, &timeout, 200, NVGPU_TIMER_RETRY_TIMER);
if (g->ops.mm.get_flush_retries)
retries = g->ops.mm.get_flush_retries(g, NVGPU_FLUSH_CBC_CLEAN);
nvgpu_timeout_init(g, &timeout, retries, NVGPU_TIMER_RETRY_TIMER);
nvgpu_mutex_acquire(&mm->l2_op_lock);