From ff3823eeb45db5d566e5cb3c8c5acb22dbcb9f82 Mon Sep 17 00:00:00 2001 From: mkumbar Date: Mon, 4 Jul 2022 18:58:20 +0530 Subject: [PATCH] gpu: nvgpu: ga10b: LSPMU interrupt update Enable/disable LSPMU interrupt in MC, as required LSPMU interrupts are configured as part of LSPMU ucode init and don't need any additional PMU IRQ register to set/clear as part of GPU power-on/off sequence. Bug 3681561 Change-Id: Ifb47bc9cc83e16e46649b0eef5f257acb02f302c Signed-off-by: mkumbar Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2739476 Reviewed-by: svcacv Reviewed-by: Vijayakumar Subbu GVS: Gerrit_Virtual_Submit --- drivers/gpu/nvgpu/hal/pmu/pmu_ga10b.c | 17 ++--------------- 1 file changed, 2 insertions(+), 15 deletions(-) diff --git a/drivers/gpu/nvgpu/hal/pmu/pmu_ga10b.c b/drivers/gpu/nvgpu/hal/pmu/pmu_ga10b.c index 130656f53..92658f87e 100644 --- a/drivers/gpu/nvgpu/hal/pmu/pmu_ga10b.c +++ b/drivers/gpu/nvgpu/hal/pmu/pmu_ga10b.c @@ -404,18 +404,9 @@ bool ga10b_pmu_is_interrupted(struct nvgpu_pmu *pmu) #endif /* - * GA10B PMU IRQ registers are not accessible when NVRISCV PRIV lockdown is - * engaged, so need to skip modifying/configuring IRQ registers. - * - * HAL checks for PRIV lockdown and if enabled then just enable PMU interrupt - * from MC, if not enabled then follows legacy chip method to configure - * the PMU interrupt. * * Interrupts required for LS-PMU are configured by LS-PMU ucode as part of - * LS-PMU init code. - * - * Legacy chip path helps to configure interrupt required of non LS-PMU ucode - * or power-off path to clear interrupt. + * LS-PMU init code, so just enable/disable PMU interrupt from MC. * */ void ga10b_pmu_enable_irq(struct nvgpu_pmu *pmu, bool enable) @@ -424,13 +415,9 @@ void ga10b_pmu_enable_irq(struct nvgpu_pmu *pmu, bool enable) nvgpu_log_fn(g, " "); - if (g->ops.falcon.is_priv_lockdown(pmu->flcn)) { - nvgpu_cic_mon_intr_stall_unit_config(g, + nvgpu_cic_mon_intr_stall_unit_config(g, NVGPU_CIC_INTR_UNIT_PMU, enable); - } else { - gv11b_pmu_enable_irq(pmu, enable); - } } static int ga10b_pmu_handle_ecc(struct gk20a *g)