Commit Graph

6 Commits

Author SHA1 Message Date
Deepak Nibade
7ed3d0dcf4 gpu: nvgpu: tu104: support SLCG/BLCG
Generate gating register list for Turing SLCG/BLCG in
common/clock_gating/tu104_gating_reglist.c

Set all the gops.clock_gating HALs

Jira NVGPUT-108
Bug 200456693

Change-Id: Ie7e3e6951b1eea0c48a25db93d391b7a82df5fd9
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1919938
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2018-10-26 02:11:08 -07:00
Deepak Nibade
0f68b79add gpu: nvgpu: gv100: update gating reglist
Current gating reglist includes both unicast and broadcast registers
Having unicast registers is unnecessary since corresponding broadcast
registers are already being written

Also some of the unicast registers were manually commented out in
auto generated file to avoid PRI timeouts

Re-generate gating reglist with new script which skips unicast
registers so that we don't have to manually update auto generated
file

Bug 2150883

Change-Id: I0b099d23049d8c7154a9b1fb709dd9e6709cdf38
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1922579
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2018-10-12 17:35:12 +05:30
Alex Waterman
775c69af8c gpu: nvgpu: Add types.h to clock gating headers
The headers use u32 and bool but do not include <nvgpu/types.h>.
Moving around header includes exposed this issue in the cascade
builds.

This patch fixes the problem in all clock gating headers to
avoid this being a concern in the future.

Change-Id: Id56074df393d95bf65baf4062ac811d80d87e96b
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1729748
Reviewed-by: Bo Yan <byan@nvidia.com>
2018-05-24 13:50:35 -07:00
Vinod G
0f81c5616b gpu: nvgpu: Code updates for MISRA violations
Regenerated the gating_reglist.c files for various
chips after fixing the script for MISRA C-2012
violations

Rule 15.5: Multiple points of exit detected
Rule 15.6: "if" body without compound statement
Rule 10.3: Implicit conversions of 64bit to 32bit int
Rule 7.2: Const must be declared with "U"
Rule 5.7: Tags with name xxx already declared

Add preprocessor conditional gaurds in
gating_reglist header files

JIRA NVGPU-671
JIRA NVGPU-656
JIRA NVGPU-688
JIRA NVGPU-686
JIRA NVGPU-644

Change-Id: Ie5a688cb8c39f072d2a15d86fb0ee0f2039a2cf1
Signed-off-by: Vinod G <vinodg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1724444
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2018-05-24 04:38:06 -07:00
Sourab Gupta
67c4571d95 gpu: nvgpu: use nvgpu types.h in clock gating source
Use the nvgpu/types.h instead of linux/types.h in the clock
gating sources

Jira VQRM-3700

Change-Id: Ib399cc4367c77f0d08454aa7639bb619367f673b
Signed-off-by: Sourab Gupta <sourabg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1726782
Reviewed-by: Shashank Singh <shashsingh@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2018-05-22 15:08:44 -07:00
Vinod G
dffeea5deb gpu: nvgpu: Code updates for MISRA violations
As part of the MISRA fixes, moving all the
gating_reglist files to common/clock_gating dir,
the new directory structure suggested to follow.

Removed unused gating_reglist files for gk20a

JIRA NVGPU-646

Change-Id: I388855befcf991ee68eeffed10fe9ac456210649
Signed-off-by: Vinod G <vinodg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1722330
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2018-05-21 13:55:00 -07:00