4 Commits

Author	SHA1	Message	Date
ddutta	83103cdcca	gpu: nvgpu: move set_min_max out of safety build ... nvgpu_channel_sync_set_min_eq_max is not used as part of the safety build and hence is moved out. channel_sync_syncpt_set_min_eq_max is also moved out as a part of the above function. Also add a branch coverage for the case when g->disable_syncpoints is set to true. Jira NVGPU-913 Change-Id: I2512d01e105551732aad63b2800bb4cb6d913cb2 Signed-off-by: ddutta <ddutta@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2263003 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>	2020-12-15 14:10:29 -06:00
Debarshi Dutta	f6c96f620f	gpu: nvgpu: add CONFIG_NVGPU_KERNEL_MODE_SUBMIT flag ... The following functions belong to the path of kernel_mode submit and the flag CONFIG_NVGPU_KERNEL_MODE_SUBMIT is used to compile these out of safety builds. channel_gk20a_alloc_priv_cmdbuf channel_gk20a_free_prealloc_resources channel_gk20a_joblist_add channel_gk20a_joblist_delete channel_gk20a_joblist_peek channel_gk20a_prealloc_resources nvgpu_channel nvgpu_channel_add_job nvgpu_channel_alloc_job nvgpu_channel_alloc_priv_cmdbuf nvgpu_channel_clean_up_jobs nvgpu_channel_free_job nvgpu_channel_free_priv_cmd_entry nvgpu_channel_free_priv_cmd_q nvgpu_channel_from_worker_item nvgpu_channel_get_gpfifo_free_count nvgpu_channel_is_prealloc_enabled nvgpu_channel_joblist_is_empty nvgpu_channel_joblist_lock nvgpu_channel_joblist_unlock nvgpu_channel_kernelmode_deinit nvgpu_channel_poll_wdt nvgpu_channel_set_syncpt nvgpu_channel_setup_kernelmode nvgpu_channel_sync_get_ref nvgpu_channel_sync_incr nvgpu_channel_sync_incr_user nvgpu_channel_sync_put_ref_and_check nvgpu_channel_sync_wait_fence_fd nvgpu_channel_update nvgpu_channel_update_gpfifo_get_and_get_free_count nvgpu_channel_update_priv_cmd_q_and_free_entry nvgpu_channel_wdt_continue nvgpu_channel_wdt_handler nvgpu_channel_wdt_init nvgpu_channel_wdt_restart_all_channels nvgpu_channel_wdt_restart_all_channels nvgpu_channel_wdt_rewind nvgpu_channel_wdt_start nvgpu_channel_wdt_stop nvgpu_channel_worker_deinit nvgpu_channel_worker_from_worker nvgpu_channel_worker_init nvgpu_channel_worker_poll_init nvgpu_channel_worker_poll_wakeup_post_process_item nvgpu_channel_worker_poll_wakeup_process_item nvgpu_submit_channel_gpfifo_kernel nvgpu_submit_channel_gpfifo_user gk20a_userd_gp_get gk20a_userd_pb_get gk20a_userd_gp_put nvgpu_fence_alloc The following members of struct nvgpu_channel are compiled out of safety build. struct gpfifo_desc gpfifo; struct priv_cmd_queue priv_cmd_q; struct nvgpu_channel_sync *sync; struct nvgpu_list_node worker_item; struct nvgpu_channel_wdt wdt; The following files are compiled out of safety build. common/fifo/submit.c common/sync/channe1_sync_semaphore.c hal/fifo/userd_gv11b.c Jira NVGPU-3479 Change-Id: If46c936477c6698f4bec3cab93906aaacb0ceabf Signed-off-by: Debarshi Dutta <ddutta@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2127212 GVS: Gerrit_Virtual_Submit Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>	2019-06-30 22:04:48 -07:00
Seema Khowala	312f91f991	gpu: nvgpu: move fence_gk20a to common/fence ... Move gk20a/fence_gk20a.c to common/fence/fence.c Renamed gk20a_fence_from_semaphore -> nvgpu_fence_from_semaphore gk20a_fence_from_syncpt -> nvgpu_fence_from_syncpt gk20a_alloc_fence_pool -> nvgpu_fence_pool_alloc gk20a_free_fence_pool -> nvgpu_fence_pool_free gk20a_alloc_fence -> nvgpu_fence_alloc gk20a_init_fence -> nvgpu_fence_init gk20a_fence_put -> nvgpu_fence_put gk20a_fence_get -> nvgpu_fence_get gk20a_fence_wait -> nvgpu_fence_wait gk20a_fence_is_expired -> nvgpu_fence_is_expired gk20a_fence_install_fd -> nvgpu_fence_install_fd gk20a_fence_ops struct -> nvgpu_fence_ops struct gk20a_fence struct -> nvgpu_fence_type struct JIRA NVGPU-1982 Change-Id: Ife77b2c3c386ff4368683c78ca02f00c99cddb4b Signed-off-by: Seema Khowala <seemaj@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2093002 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>	2019-04-10 17:24:52 -07:00
Debarshi Dutta	6fe9bb835b	gpu: nvgpu: access channel_sync via public API ... struct nvgpu_channel_sync is moved to a private header i.e. channel_sync_priv.h present in common/sync/. All accesses to callback functions inside the struct nvgpu_channel_sync in NVGPU driver is replaced by the public channel_sync specific APIs. Jira NVGPU-1093 Change-Id: I52d57b3d458993203a3ac6b160fb569effbe5a66 Signed-off-by: Debarshi Dutta <ddutta@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1929783 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>	2018-10-26 02:12:23 -07:00