MISRA rule 21.2 doesn't allow the use of macro names which start with
an underscore. These leading underscores are to be removed from the
macro names. This patch will fix such violations in the
include directory by renaming them to follow the convention,
'NVGPU_PARENT-DIR_HEADER_H'.
JIRA NVGPU-1028
Change-Id: I14e3558c80511314e32ef79c2b609a9fd9cf0a44
Signed-off-by: smadhavan <smadhavan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1813123
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com>
Reviewed-by: Adeel Raza <araza@nvidia.com>
Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Add MC HAL is_intr1_pending. At the same time introduce nvgpu_unit
that is passed as parameter to is_intr1_pending. The API is passed
contents of intr1 register and an engine number, and returns true
if there's an interrupt pending for the engine.
JIRA NVGPU-26
Change-Id: I8e6363dd78572f8e41dbab2b258036ed168b6f75
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1497870
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
