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4 Commits

Author SHA1 Message Date
Debarshi Dutta
17486ec1f6 gpu: nvgpu: rename tsg_gk20a and channel_gk20a structs 
rename struct tsg_gk20a to struct nvgpu_tsg and rename struct
channel_gk20a to struct nvgpu_channel

Jira NVGPU-3248

Change-Id: I2a227347d249f9eea59223d82f09eae23dfc1306
Signed-off-by: Debarshi Dutta <ddutta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2112424
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-05-06 02:56:53 -07:00
Thomas Fleury
5b1b2b98aa gpu: nvgpu: tsg MISRA fixes for Rule 8.6 
Remove declaration of gk20a_tsg_event_id_post_event (which has
been renamed to nvgpu_tsg_event_id_post_event).

Jira NVGPU-3259

Change-Id: Ib0bdadefcd30e8b3063cb1da85aae352f182c6d0
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2111433
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-05-03 15:15:51 -07:00
Thomas Fleury
9121f84e67 gpu: nvgpu: move post_event_id from fifo to tsg 
Moved the following HAL from fifo to tsg:
- tsg.post_event_id

Implemented as
- nvgpu_tsg_post_event_id

Jira NVGPU-2979

Change-Id: I074233aaf96b33d011b50b1465ea5d76e0a43689
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2087186
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-04-10 10:36:44 -07:00
Thomas Fleury
b8ceeae21e gpu: nvgpu: move enable/disable from fifo to tsg 
Moved enable/disable HALs from fifo to tsg:
- tsg.enable
- tsg.disable

gk20a_tsg_enable and gv11b_tsg_enable are moved to HAL,
since they are chip specific, even though they do not
directly access chip registers.

Removed vgpu_gv11b_tsg_enable as it was identical to
gv11b_tsg_enable.

Changed gv11b_fifo_locked_abort_runlist_active_tsgs and
gv11b_fifo_teardown_ch_tsg to use tsg.enable HAL instead
of calling directly gk20a_disable_tsg HAL implementation.

Jira NVGPU-2979

Change-Id: I721650c64dcf8cd158652e362292af45df43819f
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2083156
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-03-29 10:34:14 -07:00