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19 Commits

Author SHA1 Message Date
Scott Long
1af248cfe1 gpu: nvgpu: fb: fix misra 2.7 violations 
Advisory Rule 2.7 states that there should be no unused
parameters in functions.

This patch removes the unused struct gk20a pointer from the
following functions:

 * gv11b_fb_get_replay_start_ack_all()
 * gv11b_fb_get_replay_cancel_global_val()

Jira NVGPU-3178

Change-Id: I9806bc2f7cdfb45028e10a361444108bf2fbc27d
Signed-off-by: Scott Long <scottl@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2175617
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-08-19 12:56:01 -07:00
Vedashree Vidwans
afae2efc23 gpu: nvgpu: fix MISRA errors in nvgpu.hal.mm 
Rule 8.6 requires each identifier with external linkage to have exactly
one external definitions.
Rule 10.x necessitates operands to have essential type; left and right
operands should be of same width and type.
Rule 14.3 doesn't allow controlling expressions to be invariant;
ensuring that all conditions are possible.

Jira NVGPU-3858

Change-Id: I043a3836c4a2cb9c5a52d3053516c517389f55a2
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2162295
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Adeel Raza <araza@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-07-29 12:45:40 -07:00
Vedashree Vidwans
cb05e9fc1b gpu: nvgpu: fix error log message hal.mm.mmu_fault 
This is a follow on patch to fix error log message in hal/mm/mmu_fault/
mmu_fault_gv11b_fusa.c.

Jira NVGPU-3805

Change-Id: I73db30f9cf5d05ea29afd2c2691f9864d06715b9
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2154236
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-07-16 16:16:35 -07:00
Vedashree Vidwans
e303b7e604 gpu: nvgpu: fix MISRA errors hal.mm.mmu_fault 
Rule 15.7 needs if-elseif constructs to be terminated with else
statement.
Rule 17.7 requires function return value to be checked for error
information.

Jira NVGPU-3805

Change-Id: Ie81e5ae0f6d8c0323fed036e0e65223ec60c52c7
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2152021
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-07-15 13:36:03 -07:00
Rajesh Devaraj
cd4fa084c1 gpu: nvgpu: report MMU page fault errors to 3LSS 
This patch adds support to report MMU page fault errors to 3LSS.

JIRA NVGPU-3459

Change-Id: I3f06e594a75ae79bf4deef9acdc1829a002ea869
Signed-off-by: Rajesh Devaraj <rdevaraj@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2142742
GVS: Gerrit_Virtual_Submit
Reviewed-by: Antony Clince Alex <aalex@nvidia.com>
Reviewed-by: Ankur Kishore <ankkishore@nvidia.com>
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 2019-07-05 08:09:12 -07:00
Vedashree Vidwans
8f4b8e2b4e gpu: nvgpu: fix misra violations nvgpu.common.nvgpu 
MISRA Rule 10.4 requires both right and left operand to have same
essential type.
MISRA Rule 13.5 doesn't allow right hand operand of logical operator to
not have persistent side effects.

This patch fixes rule 10.4 and 13.5 in nvgpu/include/nvgpu/safe_ops.h.

Jira NVGPU-3737

Change-Id: If11c800df1bd74d68a8e2c99000de43fe1b7edc8
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2143924
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Divya Singhatwaria <dsinghatwari@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
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 2019-07-02 03:04:52 -07:00
Nicolas Benech
9a4ad88f21 gpu: nvgpu: hal: split MM-related HALs based on FUSA 
This patch moves MM HALs that are guaranteed to be functionaly safe
into _fusa.c files. HALs that are not part of FUSA are not compiled
anymore when the safety profile is enabled.

Given a HAL source file:
- it may contain only FUSA code, in that case the source file is
  simply renamed with the _fusa postfix.
- it may contain only non-FUSA code, in that case the file is left
  as-is
- it may contain a mix, in that case the original file will now only
  contain non-FUSA code, and all FUSA code will be moved into a new
  source file with the _fusa postfix.

JIRA NVGPU-3690

Change-Id: I44c604aef2d72252abb7da1c0ef1210d71a0efa7
Signed-off-by: Nicolas Benech <nbenech@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2140895
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
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 2019-06-27 01:36:07 -07:00
Philip Elcan
d388e45d98 gpu: nvgpu: mm: fix CERT-C INT30 violations in mmu_fault 
Fix CERT-C INT30 violations in mmu_fault_gv11b.c. INT30 requires
checking for wrap when doing unsigned arithmetic. Use safe ops and
asserts to comply.

JIRA NVGPU-3628

Change-Id: I7f5024d1e95784e0ff3702c8da20e54233df468c
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2133799
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-06-12 14:17:05 -07:00
Philip Elcan
8f25fe41e2 gpu: nvgpu: mm: fix CERT-C STR30 violation in mmu_fault 
Fix CERT-C Rule STR30 violation for assigning string literal to
non-const pointer by changing the declaration.

JIRA NVGPU-3628

Change-Id: I804cf2e02c40b934a1575faa68a0cc3849927699
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2133798
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-06-12 14:16:50 -07:00
Sagar Kamble
3f08cf8a48 gpu: nvgpu: rename feature Make and C flags 
Name the Make and C flag variables consistently wih syntax:
CONFIG_NVGPU_<feature name>

s/NVGPU_DEBUGGER/CONFIG_NVGPU_DEBUGGER
s/NVGPU_CYCLESTATS/CONFIG_NVGPU_CYCLESTATS
s/NVGPU_USERD/CONFIG_NVGPU_USERD
s/NVGPU_CHANNEL_WDT/CONFIG_NVGPU_CHANNEL_WDT
s/NVGPU_FEATURE_CE/CONFIG_NVGPU_CE
s/NVGPU_GRAPHICS/CONFIG_NVGPU_GRAPHICS
s/NVGPU_ENGINE/CONFIG_NVGPU_FIFO_ENGINE_ACTIVITY
s/NVGPU_FEATURE_CHANNEL_TSG_SCHED/CONFIG_NVGPU_CHANNEL_TSG_SCHED
s/NVGPU_FEATURE_CHANNEL_TSG_CONTROL/CONFIG_NVGPU_CHANNEL_TSG_CONTROL
s/NVGPU_FEATURE_ENGINE_QUEUE/CONFIG_NVGPU_ENGINE_QUEUE
s/GK20A_CTXSW_TRACE/CONFIG_NVGPU_FECS_TRACE
s/IGPU_VIRT_SUPPORT/CONFIG_NVGPU_IGPU_VIRT
s/CONFIG_TEGRA_NVLINK/CONFIG_NVGPU_NVLINK
s/NVGPU_DGPU_SUPPORT/CONFIG_NVGPU_DGPU
s/NVGPU_VPR/CONFIG_NVGPU_VPR
s/NVGPU_REPLAYABLE_FAULT/CONFIG_NVGPU_REPLAYABLE_FAULT
s/NVGPU_FEATURE_LS_PMU/CONFIG_NVGPU_LS_PMU
s/NVGPU_FEATURE_POWER_PG/CONFIG_NVGPU_POWER_PG

JIRA NVGPU-3624

Change-Id: I8b2492b085095fc6ee95926d8f8c3929702a1773
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2130290
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-06-11 09:46:24 -07:00
Thomas Fleury
97762279b7 gpu: nvgpu: make nvgpu_init_mutex return void 
Make the nvgpu_init_mutex function return void.
In linux case, this doesn't affect anything since mutex_init
returns void.
For posix, we assert() and die if pthread_mutex_init fails.

This alleviates the need to error inject for _every_
nvgpu_mutex_init function in the driver.

Jira NVGPU-3476

Change-Id: Ibc801116dc82cdfcedcba2c352785f2640b7d54f
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2130538
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-06-05 10:25:52 -07:00
Seema Khowala
1e570d5a16 gpu: nvgpu: Add NVGPU_REPLAYABLE_FAULT compiler flag 
This flag is added to compile out replayable fault support for
safety build.

JIRA NVGPU-3514

Change-Id: I4ee56e6637a4fe70dd22ed91c1ebf1c53c29278d
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2124379
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-05-25 02:45:05 -07:00
Debarshi Dutta
4c30bd599f gpu: nvgpu: rename tsg_gk20a*/gk20a_tsg* functions. 
rename the functions with the prefixes tsg_gk20a*/gk20a_tsg*
to nvgpu_tsg_*

Jira NVGPU-3248

Change-Id: I9f5f601040d994cd7798fe76813cc86c8df126dc
Signed-off-by: Debarshi Dutta <ddutta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2120165
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-05-17 01:49:27 -07:00
Seema Khowala
671f1c8a36 gpu: nvgpu: channel MISRA fix for Rule 21.2 
Rename
_gk20a_channel_get -> nvgpu_channel_get__func
gk20a_channel_get -> nvgpu_channel_get
_gk20a_channel_put -> nvgpu_channel_put__func
gk20a_channel_put -> nvgpu_channel_put
trace_gk20a_channel_get -> trace_nvgpu_channel_get
trace_gk20a_channel_put -> trace_nvgpu_channel_put

JIRA NVGPU-3388

Change-Id: I4e37adddbb5ce14aa18132722719ca2f73f1ba52
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2114118
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-05-09 04:39:34 -07:00
Philip Elcan
93cfec16a9 gpu: nvgpu: mm: fix MISRA 21.2 in page_table 
MISRA rule 21.2 prohibits using __name for functions and identifiers.
Fix MISRA 21.2 violations in nvgpu.common.mm.gmmu.page_table.

JIRA NVGPU-3340

Change-Id: I8963ce4df96e4e9cf286135d87bfab7703d4f5bd
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2110595
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
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 2019-05-07 21:38:02 -07:00
Alex Waterman
6de260dcfb gpu: nvgpu: Fixups for comment is new MM HAL code 
This fixes a few nits and issues in the comments of the MMU fault
and MM HAL headers.

JIRA NVGPU-2042

Change-Id: Ic4c5bf4bcc3c347e11f98a7cd746a7238919dc1e
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2113065
Reviewed-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Philip Elcan <pelcan@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-05-06 16:46:37 -07:00
Debarshi Dutta
17486ec1f6 gpu: nvgpu: rename tsg_gk20a and channel_gk20a structs 
rename struct tsg_gk20a to struct nvgpu_tsg and rename struct
channel_gk20a to struct nvgpu_channel

Jira NVGPU-3248

Change-Id: I2a227347d249f9eea59223d82f09eae23dfc1306
Signed-off-by: Debarshi Dutta <ddutta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2112424
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
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 2019-05-06 02:56:53 -07:00
Alex Waterman
38c255c8a9 gpu: nvgpu: Rename gmmu_gmmu fault HALs 
Rename the gv11b_gmmu_* fault handling HALs to reflect their new
location under hal/mm/mmu_fault.

JIRA NVGPU-2042

Change-Id: I7ab8fe7ef922f36a907c45eeb210d72ff1447e4e
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2109694
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
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 2019-05-03 16:26:17 -07:00
Alex Waterman
c053bc0226 gpu: nvgpu: Move gv11b MMU fault handling to HAL 
Move the gv11b MMU fault handling code into a new mm.mmu_fault HAL.
Also move the existing gmmu_mmu_fault HAL code into this HAL as they
are basically the same logical entity.

JIRA NVGPU-2042
JIRA NVGPU-1313

Change-Id: I41d3e180c762f191d4de3237e9052bdc456f9e4c
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2109693
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-05-03 16:26:07 -07:00