vgpu_gv11b_tsg_bind_channel() was specific to gv11b. Modify
function vgpu_tsg_bind_channel() to handle gv11b specific
case by checking if subctx is supported.
Delete gv11b specific file common/vgpu/gv11b/vgpu_tsg_gv11b.c
and update arch yaml file accordingly.
Jira GVSCI-994
Change-Id: I36c1f7392087573afa06cd3652a145aa92055f1c
Signed-off-by: Aparna Das <aparnad@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2138389
Reviewed-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Nirav Patel <nipatel@nvidia.com>
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In TU104 tsense is not calibrated and tsosc needs to be used.
Tsosc is the POR for TU104.
This patch does the following
Remove the GP106 related thermal header and Add TU104 therm.
Rename the files from therm_gp106 to therm_tu104.
Update the debug fs interface to reflect the same.
Update the yaml files.
Bug 200526122
Change-Id: I73fd7d4c516426b5c6b84762480be2d6d572d5a7
Signed-off-by: Abdul Salam <absalam@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2135139
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Fix the following MISRA rule violations in bitops unit,
MISRA Rule 10.1
MISRA Rule 10.3
MISRA Rule 10.4
MISRA Rule 11.8
MISRA Rule 21.2
Introduce nvgpu specific functions for bitops and bitmap operations
with unsigned integer as parameter for offset. OS specific type
conversions and handling of these inerfaces are taken care in the
respective OS files.
Jira NVGPU-3545
Change-Id: Ib1ef76563db6ba1d879a0b4d365b2958ea03f85c
Signed-off-by: ajesh <akv@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2129513
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Move all definitions and functions other than type defines from types.h
to new header utils.h for posix.
Update files that use functions and defintions from utils.h
Jira NVGPU-3411
Change-Id: I6d9b165f882282450d4b35f4d6a0200effe76791
Signed-off-by: Vinod G <vinodg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2130529
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-by: Nitin Kumbhar <nkumbhar@nvidia.com>
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The utils unit contains utilities that are useful to everyone. Things
like rbtree, enabled, string, etc go here. This helps prevent clutter
in the top level common directory. Also by organizing source code into
these top level units we reduce our SWUD burden: all utility code may
be described by one SWUD instead of many tiny SWUDs.
JIRA NVGPU-3544
Change-Id: Idc6169f375ba87b8a5d325712bf09aee8f27fb96
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2127479
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This patch moves gops init related to SDL from qnx to common-core. For this
purpose, it does the following changes:
- Adds stub functions for linux and posix.
- Updates nvgpu_init.c for mapping err_ops with report error APIs.
- Updates nvgpu_err.h header file to include prototypes related to error
reporting APIs.
- Updates nvgpu-linux.yaml file to include sdl_stub file.
Jira NVGPU-3237
Change-Id: Idbdbe6f8437bf53504b29dc2d50214484ad18d6f
Signed-off-by: Rajesh Devaraj <rdevaraj@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2119681
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Some functions are not accessing hardware directly
but are being called using HAL ops: For example
.init = gv100_bios_init,
.preos_wait_for_halt = gv100_bios_preos_wait_for_halt,
.preos_reload_check = gv100_bios_preos_reload_check,
.devinit = gp106_bios_devinit,
.preos = gp106_bios_preos,
.verify_devinit = NULL,
This was being called as:
g->ops.bios.init(g)
g->ops.bios.preos_wait_for_halt(g)
g->ops.bios.preos_reload_check(g)
g->ops.bios.preos(g)
g->ops.bios.devinit(g)
g->ops.bios.verify_devinit(g)
Change the function access by using sw ops, like:
Create new function: nvgpu_bios_sw_init()
and based on hardware chip call the chip specific
bios sw init function: nvgpu_gv100_bios_sw_init()
and nvgpu_tu104_bios_sw_init()to assign the sw
ops
JIRA NVGPU-2071
Change-Id: Ibfcd9b225a7bc184737abdd94c2e54190fcd90a0
Signed-off-by: Divya Singhatwaria <dsinghatwari@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2108526
GVS: Gerrit_Virtual_Submit
Reviewed-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-by: Vaibhav Kachore <vkachore@nvidia.com>
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Add makefile targets to the tmake nvgpu-drv build to execute the arch.py
script before compiling the driver. This ensures that our source matches
our YAML at all times.
Also add one YAML fix to make sure the arch check actually passes!
JIRA NVGPU-3075
Change-Id: Ic893a26889732ce55ce16b0188da337629921e6b
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2119821
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Philip Elcan <pelcan@nvidia.com>
GVS: Gerrit_Virtual_Submit
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Update the YAML docs to match the current source code exactly. This of
course may go out of date again, but this is a pre-req to enabling the
YAML compilation check.
JIRA NVGPU-3074
JIRA NVGPU-3075
Change-Id: Id66e058d86a1e6637ad7b942bfe455c355eb85a7
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2119820
GVS: Gerrit_Virtual_Submit
Reviewed-by: Nicolas Benech <nbenech@nvidia.com>
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Add the YAML arch to the linux-nvgpu repo so that the arch and source
code can be kept entirely in sync.
When the YAML was in a separate repo it was too difficult to keep things
in sync. Based on this work the next steps are:
1. Gate compilation on no sources issues (missing or orphan source
files.
2. Perhaps use the arch to generate the Makefile.sources files.
JIRA NVGPU-3074
JIRA NVGPU-3075
Bug 2587555
Change-Id: Ic62be3e5e7ea1fb61ea50a2d611f905fa574988f
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2113154
Reviewed-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
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