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16 Commits

Author SHA1 Message Date
Ramesh Mylavarapu
98e6f68ccf Revert "Revert "nvgpu: gpu: Add boardobj class_ids to all units"" 
This reverts commit 29179624564c7fe538fef89708fd1b54a6e612ba.

Change-Id: Ic3dca94106cfea0c77cff07597545c4d6c8166c0
Signed-off-by: rmylavarapu <rmylavarapu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2194823
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
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 2020-12-15 14:05:52 -06:00
Prabhu Kuttiyam
53a58c9bb4 Revert "nvgpu: gpu: Add boardobj class_ids to all units" 
This reverts commit 0d3a489de0fbb67fb70a7431b6073f248384f6cf.

Change-Id: I23bda44bf6e933d5c2f62ec025c48eb76215857a
Signed-off-by: Prabhu Kuttiyam <pkuttiyam@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2194528
Reviewed-by: Akshatha Somayaji <asomayaji@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
 2020-12-15 14:05:52 -06:00
rmylavarapu
5756924a8b nvgpu: gpu: Add boardobj class_ids to all units 
- Class_ids of all the units has been changed in safety
PMU ucode, this CL will have the updated class_ids of all
units.
NVGPU-4007

Change-Id: Ic109b5140840da64f903be6b3de88c5d948b3d1c
Signed-off-by: rmylavarapu <rmylavarapu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2191523
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:05:52 -06:00
Sagar Kadamati
77051a8c86 gpu: nvgpu: compiled out non-safe devctls 
The following DEVCTLs not needed in safety build
Compiled out below DEVCTLs for safety build

 * NVGPU_GPU_DEVCTL_SET_THERM_ALERT_LIMIT
 * NVGPU_GPU_DEVCTL_GET_TPC_EXCEPTION_EN_STATUS
 * NVGPU_GPU_DEVCTL_GET_CPU_TIME_CORRELATION_INFO

Also added config flag CONFIG_NVGPU_IOCTL_NON_FUSA

JIRA NVGPU-3768

Change-Id: Ia233d0aac8201268524581f588d97390a913ab9c
Signed-off-by: Sagar Kadamati <skadamati@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2159398
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-07-26 13:27:22 -07:00
Mahantesh Kumbar
3d1169544f gpu: nvgpu: alloc space for PMU's struct nvgpu_pmu at runtime 
Allocating space for struct nvgpu_pmu at run time as part of
nvgpu_pmu_early_init() stage and made required changes to
dependent fiels as needed.

JIRA NVGPU-1972

Change-Id: I2d1c86d713e533c256ba95b730aa2e9543a66438
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2110109
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-05-23 00:56:55 -07:00
Abdul Salam
b6b1af387d gpu: nvgpu: Add pmu as argument for all therm functions 
Add struct nvgpu_pmu as argument for all therm functions.
This will help in unit testing of public functions in therm unit.

Jira NVGPU-3216

Change-Id: Icf48c68bacda2f65dfaa9578f46c0a588c683ed4
Signed-off-by: Abdul Salam <absalam@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2113641
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Mahantesh Kumbar <mkumbar@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
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 2019-05-09 09:23:47 -07:00
Abdul Salam
bba7a89be4 gpu: nvgpu: Move therm_pmu from gk20a to nvgpu_pmu 
The aim is to have single pmu structure inside gk20a, that is nvgpu_pmu
struct and all the global structures of all units in PMU should be 
included in nvgpu_pmu struct.

Jira NVGPU-3216

Change-Id: Idc8c6c73514049809cfbde4ca6c1ad75688a5b80
Signed-off-by: Abdul Salam <absalam@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2112732
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-05-07 02:02:54 -07:00
Sagar Kamble
bcbc87dc2e gpu: nvgpu: move pmu interface headers to include/nvgpu/pmu 
Interface header files for PMU features are now moved under PMU header
files directory include/nvgpu/pmu. And fix bulk of coding style issues.
Update header file names and guards.

JIRA NVGPU-1971

Change-Id: Idf53fc09d8928d1b0a1cd16eef886de010dae06b
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2093006
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-04-13 12:33:52 -07:00
Sagar Kamble
16953b9622 gpu: nvgpu: prepare pmu command unit 
pmu_ipc.c had functionality for rpc response handling and message cond
checks. This patch moves them to msg unit. And prepare cmd.h to group
together structs and functions related PMU commands.

JIRA NVGPU-1970

Change-Id: Iec5d72d02ab3ee51963631c828b301c56af8dc48
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2079146
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
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 2019-04-05 05:06:22 -07:00
Sagar Kamble
b8b02885af gpu: nvgpu: add rpc handlers for therm, volt, perfmon and acr 
RPC handlers for therm, volt, perfmon and acr were open coded in the
pmu_rpc_handler. Instead, add implementations to respective units.
To avoid the dereferncing of struct nvgpu_pmu to avoid the circular
dependency we pass gk20a struct as input to nvgpu_pmu_rpc_execute
and other pmu_ipc.c functions.

JIRA NVGPU-1970

Change-Id: I6ea046960936923e69242bf90e8e25958cfba85e
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2079145
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-by: Ankur Kishore <ankkishore@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
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 2019-04-05 05:06:07 -07:00
Sagar Kamble
2250ccbe35 gpu: nvgpu: remove seq_desc parameter of pmu callbacks 
This parameter isn't used by the callbacks and plan is to keep
access to sequence struct members within IPC units.

JIRA NVGPU-1970

Change-Id: Idcdf4e8f493386be38a5c8a63a741ac06ce1b06e
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2079140
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-by: Ankur Kishore <ankkishore@nvidia.com>
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 2019-04-05 05:04:56 -07:00
Sagar Kamble
817e8f28c1 gpu: nvgpu: remove unneeded seq_desc and msg parameter of *_pmu_cmd_post functions 
These parameters are not required. Removing those will simplify the
refactoring of the IPC units.

JIRA NVGPU-1970

Change-Id: Id381ba18b87ea21860c05cad1fa64dad8e1a59a1
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2079139
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-by: Ankur Kishore <ankkishore@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-04-05 05:04:46 -07:00
Seema Khowala
a8587d5ee3 gpu: nvgpu: rename gr_idle_timeout_default to poll_timeout_default 
Rename gr_idle_timeout_default to poll_timeout_default

Rename NVGPU_DEFAULT_GR_IDLE_TIMEOUT to
NVGPU_DEFAULT_POLL_TIMEOUT_MS

Rename gk20a_get_gr_idle_timeout to nvgpu_get_poll_timeout

JIRA NVGPU-1313

Change-Id: I17314f0fa4a386f806f6940073649a9082ee21ad
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2083130
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
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 2019-03-28 16:07:45 -07:00
Philip Elcan
538c5cbe7b gpu: nvgpu: therm: fix MISRA 10.3 violations 
Fix MISRA Rule 10.3 violations in common/pmu/therm for assigning
objects of different size or essential type.

JIRA NVGPU-1008

Change-Id: I1b940515192e9c976927dae30ba466ca885297de
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2027656
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: Adeel Raza <araza@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
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 2019-03-07 11:44:15 -08:00
Abdul Salam
c7702ab5ff gpu: nvgpu: Restructure common.pmu.therm unit 
This patch does the following.
1. Remove include of HW header files in common.
2. Append public functions with nvgpu.

Jira NVGPU-1959

Change-Id: Ibd60620e9db14b52d49577b899b2d2077b5a544a
Signed-off-by: Abdul Salam <absalam@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2019236
Reviewed-by: Debarshi Dutta <ddutta@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
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 2019-02-21 21:56:23 -08:00
Terje Bergstrom
dce78f7332 gpu: nvgpu: Move PMU code to common/pmu 
Move code interfacing with PMU tasks to common/pmu.

JIRA NVGPU-961

Change-Id: Ie62611b0ffe1196d4bfdc740e03017e1894a834f
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1950991
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
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 2019-01-10 20:09:55 -08:00