4 Commits

Author	SHA1	Message	Date
Sagar Kamble	69f990623b	gpu: nvgpu: unit: fix falcon dmemc read logic ... Falcon DMEMC register read returns the bytes copied to DMEM. There was a mistake in calculating the bytes and setting access->value properly in falcon utf register read function. Fix it. JIRA NVGPU-2220 Change-Id: If6ba03f734e27d8d0d027f873b56330c17f7aa0b Signed-off-by: Sagar Kamble <skamble@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2201515 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Divya Singhatwaria <dsinghatwari@nvidia.com> Reviewed-by: Vaibhav Kachore <vkachore@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>	2020-12-15 14:05:52 -06:00
Sagar Kamble	967a05a18a	gpu: nvgpu: remove globals from falcon utf shared library ... utf_falcons in libfalcon_utf.so are used by multiple unit tests and since unit tests are run out of order it might lead to inconsistent access to these structs. Move these to falcon unit test. Updated the logic in the falcon utf shared library to only export the interfaces to read/write to flcn registers/memory. JIRA NVGPU-2159 Change-Id: I3a1f80cce205747de4085802199ecc355bb95d6f Signed-off-by: Sagar Kamble <skamble@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2174187 GVS: Gerrit_Virtual_Submit Reviewed-by: Divya Singhatwaria <dsinghatwari@nvidia.com> Reviewed-by: Nicolas Benech <nbenech@nvidia.com> Reviewed-by: Vaibhav Kachore <vkachore@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>	2019-08-14 01:36:45 -07:00
Divya Singhatwaria	83e28e54eb	gpu: nvgpu: Add function to set falcon dmactl register ... Add nvgpu_utf_falcon_set_dmactl() function in falcon UTF to set the falcon dmactl register with desired value required for pmu reset test Also, update the register size for falcon from 0x300 to 0x400 for including pmu reset register. Rename userspace/units/facon/falcon folder to userspace/units/facon/falcon_tests JIRA NVGPU-2159 Change-Id: I0b22cff4699af6947e87019751aa85508dfdb185 Signed-off-by: Divya Singhatwaria <dsinghatwari@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2155124 Reviewed-by: Sagar Kamble <skamble@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Vaibhav Kachore <vkachore@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>	2019-08-07 04:56:40 -07:00
Sagar Kamble	ab61058ddf	gpu: nvgpu: unit: falcon memory unit test framework ... This patch adds base support to emulate IMEM/DMEM reads and writes for falcons. Unit tests will invoke helpers from this framework to test the falcons. JIRA NVGPU-2214 JIRA NVGPU-898 Change-Id: I14fe0e09d5f29c65664c709e1a3fdbcf311c731f Signed-off-by: Sagar Kamble <skamble@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2143027 GVS: Gerrit_Virtual_Submit Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>	2019-07-02 04:16:34 -07:00