2 Commits

Author	SHA1	Message	Date
Sai Nikhil	94e00ab6ad	gpu: nvgpu: gk20a: fix MISRA 10.4 Violations [1/2] ... MISRA Rule 10.4 only allows the usage of arithmetic operations on operands of the same essential type category. Adding "U" at the end of the integer literals to have same type of operands when an arithmetic operation is performed. This fixes violation where an arithmetic operation is performed on signed and unsigned int types. JIRA NVGPU-992 Change-Id: Ifb8cb992a5cb9b04440f162918a8ed2ae17ec928 Signed-off-by: Sai Nikhil <snikhil@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1822587 GVS: Gerrit_Virtual_Submit Reviewed-by: Adeel Raza <araza@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>	2018-11-09 13:27:08 -08:00
Terje Bergstrom	f00d9ca1aa	gpu: nvgpu: Move pmu HAL files to common/pmu ... Move PMU and ACR HAL source code files to live under common/pmu. Also update the #include paths and delete unnecessary #include dependencies. JIRA NVGPU-961 Change-Id: I29a220bce6de0a46b6a5fe8ff7f9dc4d67395348 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1935626 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>	2018-11-08 20:04:06 -08:00