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5 Commits

Author SHA1 Message Date
Amurthyreddy
c114b9e77e gpu: nvgpu: MISRA 14.4 err/ret/status as boolean 
MISRA rule 14.4 doesn't allow the usage of integer types as booleans
in the controlling expression of an if statement or an iteration
statement

Fix violations where the integer variables err, ret, status are used
as booleans in the controlling expression of if and loop statements.

JIRA NVGPU-1019

Change-Id: Ia950828797b8eff4bc754269ea2d9fa272f59436
Signed-off-by: Amurthyreddy <amurthyreddy@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1919111
Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Scott Long <scottl@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2018-10-12 17:35:11 +05:30
Deepak Nibade
92c1949392 gpu: nvgpu: add separate unit for cyclestats_snapshot 
Add new separate unit common/perf/cyclestats_snapshot.c and add
corresponding header file include/nvgpu/cyclestats_snapshot.h

This unit is h/w independent and simply calls gops.perf.* HALs
exposed by perf unit to do the h/w configurations

Also remove gv11b/css_gr_gv11b.* files as h/w specific sequence
implemented in them is already moved to perf unit

Rename all cyclestats_snapshot HALs in the form nvgpu_css_*()

Jira NVGPU-1103

Change-Id: I303f6becb313ac918e06c495a5fe299947a1f0b1
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1916652
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2018-10-12 17:35:11 +05:30
Deepak Nibade
362f9a7371 gpu: nvgpu: use MC hals to get MC reset mask in perf unit 
In common/perf/perf_*.c we right now include MC h/w headers to get
MC reset mask for perfmon

Use MC HAL gops.mc.reset_mask() to get reset mask instead of using
direct MC register headers

Jira NVGPU-1102

Change-Id: I06f0b3638775c07c9e4e7ac80efd479871322d50
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1852620
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2018-10-12 17:35:08 +05:30
Deepak Nibade
412c9fa30c gpu: nvgpu: add separate unit for perfbuf 
Add separate unit for perfbuf in common/perf/perfbuf.c which does not need to
include any h/w file. This unit will utilize HALs exported by
perf_*.c units for h/w accesses.
Add corresponding header file at include/nvgpu/perfbuf.h

Add new HAL gops.perfbuf with below operations :
gops.perfbuf.perfbuf_enable()
gops.perfbuf.perfbuf_disable()

Remove below debug session specific HALs
gops.dbg_session_ops.perfbuffer_enable()
gops.dbg_session_ops.perfbuffer_disable()

Delete file gv11b/dbg_gpu_gv11b.c since it is no longer needed now as it was
only including perfbuf sequence
Also remove perfbuf sequences from gk20a/dbg_gpu_gk20a.c

Jira NVGPU-1102

Change-Id: I57b87c9f0dcd85784f8002bc92728b6d78a68d98
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1819303
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2018-10-12 17:35:08 +05:30
Deepak Nibade
71a4ca9935 gpu: nvgpu: add separate unit for perf 
Add separate unit for perf under common/perf/ to provide accesses to h/w
unit hw_perf_*_.c

Implement below HALs in gm20b and gv11b specific h/w files and set them to
appropriate chips

gops.perf.enable_membuf()
gops.perf.disable_membuf()
gops.perf.membuf_reset_streaming()
gops.perf.get_membuf_pending_bytes()
gops.perf.set_membuf_handled_bytes()
gops.perf.get_membuf_overflow_status()

Jira NVGPU-1102

Change-Id: I161990fdb7283f33c0fb2ab6a8051f4bfc3bb181
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1819302
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2018-10-12 17:35:08 +05:30