Created PMU fw unit to hold PMU RTOS f/w specific ops, images,
flags & command arguments needed for PMU RTOS ucode support.
Moved PMU fw ops from gk20a.gpu_ops to pmu.fw.ops as these ops
are needed to support different version of PMU fw version for
different chips
JIRA NVGPU-1955
Change-Id: I51385d8c20524431f07cba3378676464663deb20
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2090769
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Created PMU super surface unit & moved structs/functions related to
super surface under a unit, separated super surface structs into
private/public based on its usage/access, made changes to supper
surface dependent files to reflect supper surface changes
respective to unit.
JIRA NVGPU-3045
Change-Id: I6ac426052eb60f00b432d9533460aa0afd939fe3
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2088405
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This patch fixes below two issues.
1.Currently clk arb exit is called after GPU registers are released.
This causes crash when clk arb WQ accesses GPU HW register for status.
The ideal way is to exit the clk_arb which removes the WQ from running
before calling lockout register.
2.Check if dGPU is dying during processing of PMU Commands.
This prevents race condition when PMU is waiting for response and device
is shutdown.
Bug 200488054
Change-Id: I812b07af7db4494d5ea2ed6197742ceb23d30a4b
Signed-off-by: Abdul Salam <absalam@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2081916
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
