Commit Graph

253 Commits

Author SHA1 Message Date
Thomas Fleury
80a5b864d3 gpu: nvgpu: unit: zero-init vm for as bound channels
For some tests, we build ad-hoc structures to initialize ch->vm.
Make sure related vm and mm structures are zero-initialized to
avoid intermittent failures.

Jira NVGPU-3651

Change-Id: I20637e796a6f6b188f76c40aee918d2fa15490b1
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2140264
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Sagar Kamble <skamble@nvidia.com>
Tested-by: Sagar Kamble <skamble@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-06-21 09:15:27 -07:00
Sagar Kamble
5d37a9e489 gpu: nvgpu: compile out sim changes from safety build
As sim is non-safe unit compile it out. Also removed FMODEL related
nvgpu changes and unit tests from the safety build.

JIRA NVGPU-3527

Change-Id: I22c83e195a09f9150fb6f5a3afff91df2ea075b9
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2139455
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Raghuram Kothakota <rkothakota@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
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2019-06-20 16:05:33 -07:00
Nicolas Benech
6fb619aa30 gpu: nvgpu: unit: stage some nvgpu_channel tests
The nvgpu_channel.setup_bind and enable_disable_tsg are causing
intermittent crashes in GVS, so stage them for now. Due to the
dependencies of the test functions, they just returns SUCCESS for now
(instead of disabling them entirely)

JIRA NVGPU-3640

Change-Id: I546b07b4633198f1a2c56e59e11eaa3355b1b285
Signed-off-by: Nicolas Benech <nbenech@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2136820
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
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2019-06-17 11:39:37 -07:00
Vedashree Vidwans
6f37ac5de2 gpu: nvgpu: Disable logging for safety build
This patch adds a conditional flag to filter out logging functions from
safety release build. Logging functions are replaced with stubs.

Jira NVGPU-869

Change-Id: If898b9ce8edb260727df28b407df83f0a92f61ad
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2109509
Reviewed-by: Alex Waterman <alexw@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
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2019-06-17 00:16:03 -07:00
Adeel Raza
d8b2e22de9 gpu: nvgpu: unit: set fixed offset flag for VM tests
Set the NVGPU_VM_MAP_FIXED_OFFSET flag when GPU VA is fixed.

JIRA NVGPU-3631

Change-Id: I8b0cc79e19367e2c729bc7d0744fd08d7c81e6c2
Signed-off-by: Adeel Raza <araza@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2135433
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
GVS: Gerrit_Virtual_Submit
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2019-06-16 20:44:54 -07:00
Nicolas Benech
f09d19d5a3 gpu: nvgpu: unit: force gcov.sh to use a single thread
On some host OSes, the OS may allocate virtual addresses that are
larger than can be handled by NVGPU. As a workaround, we noticed
that the host OS will not allocate such large addresses when
running single threaded. There is no other way to prevent this
issue nor is there any guarantee that this workaround will always
work...

JIRA NVGPU-1246

Change-Id: I8c89cf6be9f80bd6fb18fd1688037b9144d2d21c
Signed-off-by: Nicolas Benech <nbenech@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2135370
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
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2019-06-14 17:36:34 -07:00
Nicolas Benech
1deb1fa176 gpu: nvgpu: unit: bitmap_allocator: fix init crashes
While fixing CERT-C issues in the bitmap_allocator, a number of
asserts were added. In particular, if blk_size is 0 it will cause
a BUG(). Within the bitmap_allocator unit test, the init will try
to set blk_size to 0 to make sure it fails. Now the failure is a
BUG(), not a return code. So this fix adds EXPECT_BUG where needed.

JIRA NVGPU-906

Change-Id: I62ae725e494a7cf561ac8cac7685cffbbc8de38e
Signed-off-by: Nicolas Benech <nbenech@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2135823
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
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2019-06-13 13:16:12 -07:00
Sagar Kamble
556ddaf9a3 gpu: nvgpu: add support for removing comptags and cbc from safety build
Safety build does not support compression. This patch adds support to
compile out compression related changes - comptags, cbc.

JIRA NVGPU-3532

Change-Id: I20e4ca7df46ceec175b903a6a62dff141140e787
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2125473
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2019-06-13 10:55:27 -07:00
Adeel Raza
f2dea4e8fc gpu: nvgpu: unit: add VM batch subtest
Add a subtest to exercise the VM unit's batch mode. Batch mode is used
to optimize cache flushes.

JIRA NVGPU-3626

Change-Id: I4873d65f3fab48b11e998158669a26ad2e530dd1
Signed-off-by: Adeel Raza <araza@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2133881
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2019-06-12 12:14:37 -07:00
Thomas Fleury
4d6aafe280 gpu: nvgpu: unit: stub l2_flush for channel setup bind
Stub g->ops.mm.l2_flush for channel setup bind, as calling HALs
is failing in GVS. This does not affect branch coverage for
this unit test.

Bug 2621189

Change-Id: I3a286f8d09456fe94c661d4be7140791a5ddca61
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2134652
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
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2019-06-12 09:45:41 -07:00
ajesh
a6cbfca58c gpu: nvgpu: fix MISRA violations in bitops unit
Fix the following MISRA rule violations in bitops unit,
MISRA Rule 10.1
MISRA Rule 10.3
MISRA Rule 10.4
MISRA Rule 11.8
MISRA Rule 21.2
Introduce nvgpu specific functions for bitops and bitmap operations
with unsigned integer as parameter for offset.  OS specific type
conversions and handling of these inerfaces are taken care in the
respective OS files.

Jira NVGPU-3545

Change-Id: Ib1ef76563db6ba1d879a0b4d365b2958ea03f85c
Signed-off-by: ajesh <akv@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2129513
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2019-06-11 22:26:41 -07:00
Sagar Kamble
3f08cf8a48 gpu: nvgpu: rename feature Make and C flags
Name the Make and C flag variables consistently wih syntax:
CONFIG_NVGPU_<feature name>

s/NVGPU_DEBUGGER/CONFIG_NVGPU_DEBUGGER
s/NVGPU_CYCLESTATS/CONFIG_NVGPU_CYCLESTATS
s/NVGPU_USERD/CONFIG_NVGPU_USERD
s/NVGPU_CHANNEL_WDT/CONFIG_NVGPU_CHANNEL_WDT
s/NVGPU_FEATURE_CE/CONFIG_NVGPU_CE
s/NVGPU_GRAPHICS/CONFIG_NVGPU_GRAPHICS
s/NVGPU_ENGINE/CONFIG_NVGPU_FIFO_ENGINE_ACTIVITY
s/NVGPU_FEATURE_CHANNEL_TSG_SCHED/CONFIG_NVGPU_CHANNEL_TSG_SCHED
s/NVGPU_FEATURE_CHANNEL_TSG_CONTROL/CONFIG_NVGPU_CHANNEL_TSG_CONTROL
s/NVGPU_FEATURE_ENGINE_QUEUE/CONFIG_NVGPU_ENGINE_QUEUE
s/GK20A_CTXSW_TRACE/CONFIG_NVGPU_FECS_TRACE
s/IGPU_VIRT_SUPPORT/CONFIG_NVGPU_IGPU_VIRT
s/CONFIG_TEGRA_NVLINK/CONFIG_NVGPU_NVLINK
s/NVGPU_DGPU_SUPPORT/CONFIG_NVGPU_DGPU
s/NVGPU_VPR/CONFIG_NVGPU_VPR
s/NVGPU_REPLAYABLE_FAULT/CONFIG_NVGPU_REPLAYABLE_FAULT
s/NVGPU_FEATURE_LS_PMU/CONFIG_NVGPU_LS_PMU
s/NVGPU_FEATURE_POWER_PG/CONFIG_NVGPU_POWER_PG

JIRA NVGPU-3624

Change-Id: I8b2492b085095fc6ee95926d8f8c3929702a1773
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2130290
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
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2019-06-11 09:46:24 -07:00
Thomas Fleury
7bb278454f gpu: nvgpu: unit: use 'ret' for return code
Use 'ret' for return code, as 'rc' somehow maps to recovery

Jira NVGPU-3480

Change-Id: I31e0f3f30a9d6e4036a15e400acd71cb3a9bdfa7
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2132495
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-06-10 19:46:43 -07:00
Thomas Fleury
3136ad6a5b gpu: nvgpu: unit: add channel enable/disable tsg test
Add unit test for the following functions:
- nvgpu_channel_enable_tsg
- nvgpu_channel_disable_tsg

Jira NVGPU-3480

Change-Id: I99dc24cb2089da8105cd66f3172984c49861a2e9
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2129728
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2019-06-10 19:46:24 -07:00
Thomas Fleury
9f9909fba8 gpu: nvgpu: unit: add channel ref from inst test
Add unit test for the following functions:
- nvgpu_channel_refch_from_inst_ptr
- nvgpu_channel_from_id
- nvgpu_channel_from_id__func

Jira NVGPU-3480

Change-Id: I04bffff7edc006ff5d822aa433684f93d5613a83
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2129727
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
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2019-06-10 19:46:09 -07:00
Thomas Fleury
99db6a6d3f gpu: nvgpu: unit: add channel alloc/free inst tests
Add coverage for the following functions:
- nvgpu_channel_alloc_inst
- nvgpu_channel_free_inst

Jira NVGPU-3480

Change-Id: I754dccee69dfe04d5ae5607ad1deb6dd8c8de79f
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2129726
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
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2019-06-10 19:45:54 -07:00
Thomas Fleury
5dbf0675f4 gpu: nvgpu: unit: add channel setup_bind tests
Add coverage for the following functions:
- nvgpu_channel_setup_bind
- nvgpu_channel_setup_usermode

Jira NVGPU-3480

Change-Id: I0814928851bb42a05402d3e99a66d30bd44cb0e6
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2129725
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
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2019-06-10 19:45:40 -07:00
Thomas Fleury
0624d908cd gpu: nvgpu: unit: add channel close tests
Add branch coverage for:
- nvgpu_channel_kill
- nvgpu_channel_close

Also, modified gk20a_free_channel as follows:
- use nvgpu_assert to check ch->g (so that it can be tested)
- make sure g is non-NULL before calling nvgpu_get_poll_timeout

Jira NVGPU-3480

Change-Id: Ie1fa231b022da47b9ef9022ae67a6b3d73c28a8b
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2129724
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2019-06-10 19:45:17 -07:00
Thomas Fleury
1eef4eaae5 gpu: nvgpu: unit: add channel open tests
Add unit test for:
- gk20a_channel_open_new

Jira NVGPU-3480

Change-Id: I50d8cef746aa532712c94a3806822f5f0c7f435f
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2129723
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
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2019-06-10 19:45:03 -07:00
Thomas Fleury
d2d7922411 gpu: nvgpu: unit: add channel setup_sw/cleanup_sw
Add unit test for:
- nvgpu_channel_setup_sw
- nvgpu_channel_cleanup_sw

Jira NVGPU-3480

Change-Id: Ic691b7fa17f97022fd7d4905377f9a348d8ecae8
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2129722
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
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2019-06-10 19:44:53 -07:00
Thomas Fleury
7e890f4285 gpu: nvgpu: unit: use 'ret' for return code
Use 'ret' for return code, as 'rc' somehow maps to recovery

Jira NVGPU-3476

Change-Id: Ife862ca5b049044adee69384ee805cd2271c0679
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2132490
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Alex Waterman <alexw@nvidia.com>
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GVS: Gerrit_Virtual_Submit
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-by: Vaibhav Kachore <vkachore@nvidia.com>
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2019-06-09 22:56:42 -07:00
Thomas Fleury
7ccf26b92c gpu: nvgpu: unit: update required tests
Update required tests with tsg tests.

Jira NVGPU-3476

Change-Id: I116e43bb8b5b2ac3701a638352993ca8dddeeeb0
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2131757
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vaibhav Kachore <vkachore@nvidia.com>
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2019-06-09 22:56:06 -07:00
Thomas Fleury
f980c859e9 gpu: nvgpu: unit: cover more tsg open branches
Add branch coverage for:
- nvgpu_tsg_alloc_sm_error_states_mem

Jira NVGPU-3476

Change-Id: Ifca5b5f512536c609c11fc317d28704380a73a58
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2124514
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vaibhav Kachore <vkachore@nvidia.com>
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2019-06-09 22:55:27 -07:00
Thomas Fleury
6602baaf41 gpu: nvgpu: unit: add tsg setup_sw/cleanup_sw coverage
Add unit test for:
- nvgpu_setup_sw
- nvgpu_cleanup_sw

Made nvgpu_tsg_init_support return void, since it cannot fail.

Jira NVGPU-3476

Change-Id: Ifff115e98c097375d7920b79ae9e13657d54a357
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2124512
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
GVS: Gerrit_Virtual_Submit
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2019-06-09 22:55:18 -07:00
Thomas Fleury
7eb8ea9764 gpu: nvgpu: unit: add tsg abort coverage
Add unit test for:
- nvgpu_tsg_abort

Jira NVGPU-3476

Change-Id: Ie1d93647e8ab239ad0604b04a3d36464b2bedb5b
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2124515
GVS: Gerrit_Virtual_Submit
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
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2019-06-07 03:27:32 -07:00
Thomas Fleury
2b3f005313 gpu: nvgpu: unit: add tsg unbind branch coverage
Updated test to cover test where:
- update runlist fails during unbind
- tsg is aborted
- updated runlist fails during abort

Modified update runlist stub to return -EINVAL depending
on branch combinations.

Added custom pruning function to skip some impossible
combinations of non-final branches.

Jira NVGPU-3476

Change-Id: I23a64085239b4003b73873a984a301476d73d962
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2124513
GVS: Gerrit_Virtual_Submit
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
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2019-06-07 03:27:23 -07:00
Thomas Fleury
32aa15f9d4 gpu: nvgpu: unit: add tsg enable/disable coverage
Add unit tests for
- g->ops.tsg.enable (gv11b_tsg_enable)
- g->ops.tsg_disable (nvgpu_tsg_disable)

Use an array to allow multiple stubs to store data.

Jira NVGPU-3476

Change-Id: I2afaef6d1ec4d74a05ec6e7952e5ead86c432f3d
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2123886
GVS: Gerrit_Virtual_Submit
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
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2019-06-07 03:27:13 -07:00
Thomas Fleury
04cf2f1ba6 gpu: nvgpu: unit: add unit_assert helper
Add unit_assert helper to check condition.
In case of failure, the macro reports failed condition as well as
line number, then runs bail out code.

Jira NVGPU-3476

Change-Id: I9971e7fa0337661d46a06dfa05b67a98e3c46eee
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2129675
GVS: Gerrit_Virtual_Submit
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
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2019-06-07 03:27:04 -07:00
Thomas Fleury
eb380fcbdb gpu: nvgpu: unit: tmake userspace build for tsg
Added tmake userspace build for tsg
Added missing exports for libnvgpu-drv
Added tsg tests to required tests
Re-use fifo init/remove support

Jira NVGPU-3476

Change-Id: I5bcbbf5a9b58e825e1cad6aa5896de7e91fe7400
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2128160
GVS: Gerrit_Virtual_Submit
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
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2019-06-07 03:26:54 -07:00
Mahantesh Kumbar
b691df5a02 gpu: nvgpu: compile out PMU members & headers for safety
-compile out nvgpu_pmu members which are not required for
safety buid & modified source as required to support same.
-compile out PMU headers include which are not required for
safety code
-Removed unnecessary PMU header includes from some files

JIRA NVGPU-3418

Change-Id: I5364b1b16c46637d229e82745dd2846cb6335a72
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2128228
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-06-06 06:55:58 -07:00
Nicolas Benech
ce3facb616 gpu: nvgpu: unit: add posix-bug unit
The EXPECT_BUG construct was broken so this new unit will ensure
it does not happen again. It will also indirectly ensure that
BUG() works as intended.

JIRA NVGPU-3562

Change-Id: I09a11d616f37f8689e6f7c86840133410c5eb04e
Signed-off-by: Nicolas Benech <nbenech@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2126873
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-06-05 13:35:13 -07:00
Nicolas Benech
9909fa53f9 gpu: nvgpu: unit: fix buddy_allocator mutex handling
A separate bug caused EXPECT_BUG to always return true without actually
calling the corresponding test code. This hid some issues in the buddy
allocator unit where the fini() operation was called several times while
expecting it to call BUG(). Doing so caused the mutex unlock operation to
not be called, which caused a deadlock for all subsequent calls. The fix
is to explicitly release the mutex after each call to fini() that expects
a BUG().

JIRA NVGPU-3562

Change-Id: Ic26058a272c616d2a6052d319f38a4d4dc33ef1c
Signed-off-by: Nicolas Benech <nbenech@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2126874
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-06-05 13:35:03 -07:00
Thomas Fleury
97762279b7 gpu: nvgpu: make nvgpu_init_mutex return void
Make the nvgpu_init_mutex function return void.
In linux case, this doesn't affect anything since mutex_init
returns void.
For posix, we assert() and die if pthread_mutex_init fails.

This alleviates the need to error inject for _every_
nvgpu_mutex_init function in the driver.

Jira NVGPU-3476

Change-Id: Ibc801116dc82cdfcedcba2c352785f2640b7d54f
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2130538
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-06-05 10:25:52 -07:00
Alex Waterman
c74b89194d gpu: nvgpu: Fix address space initialization in page_table unit test
Unit tests in page_table were initializing the VM with a kernel_reserved
section that was slightly smaller than expected. Then, when the fixed
alloc to support semaphores was done, the fixed address used was actually
below the start of the kernel address space. As a result this caused an
overflow in the base shift in the buddy allocator responsible for
managing the fixed alloc.

Change-Id: I4e688d418262ac8d9d4b66b46bd32ca5456d95e8
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2130433
Reviewed-by: Philip Elcan <pelcan@nvidia.com>
Tested-by: Philip Elcan <pelcan@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-06-05 09:16:43 -07:00
Nicolas Benech
87379d2295 gpu: nvgpu: unit: increase rbtree coverage
This patch increases line and branch coverage in the rbtree unit test
by targeting a number of corner cases in the unlink/rebalancing
routines.

JIRA NVGPU-3392

Change-Id: I3caeca552d5c4c27d4a355c0ce289902621c2ff4
Signed-off-by: Nicolas Benech <nbenech@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2128048
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-06-04 13:15:04 -07:00
ajesh
a417da9094 gpu: nvgpu: move UT specific code under a define
Move all unit test specific code in bug unit under the define
__NVGPU_UNIT_TEST__.  With this change the following MISRA violations
in bug unit will be only for UT specific code,
MISRA rule 11.3
MISRA rule 21.4
MISRA rule 21.5

Jira NVGPU-3294

Change-Id: I54d3fc2bb6f1f8bc319443c522cb7036d37368e6
Signed-off-by: ajesh <akv@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2129285
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-by: Nicolas Benech <nbenech@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-06-03 12:26:18 -07:00
Philip Elcan
937f2a101a gpu: nvgpu: unit: atomics: increase reliability
The test atomic_cmpxchg_not_atomic_threaded is failing intermittently.
Increase the iterations to try to increase reliability.

NVGPU-2251

Change-Id: Ib585321a28c21d073acac5b7b8509d3af55316b8
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2127948
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Nicolas Benech <nbenech@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-06-03 11:06:06 -07:00
Thomas Fleury
741723e81a gpu: nvgpu: unit: add test module for channel
Add unit test module for channel.
Move re-usable code at units/fifo level.
This included init and remove fifo support.

Added missing exports for libnvgpu-drv

Jira NVGPU-3480

Change-Id: Ibe4b423c3fb032b4add242d6c6dd705e43617b6e
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2126662
Reviewed-by: Nicolas Benech <nbenech@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-05-31 18:15:43 -07:00
Nicolas Benech
2e3523482d gpu: nvgpu: userspace: fix missing fault injection flag
While preparing the userspace builds for safety, one flag for
fault injection went missing from the host userspace build. This
patch adds it back so that the compile flags for host are the same
as the ones defined in NV_COMPONENT_CFLAGS for target.

JIRA NVGPU-1246

Change-Id: Ia448622f7000ebd46b3b8a17520e30a4f6ccfed9
Signed-off-by: Nicolas Benech <nbenech@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2128481
Reviewed-by: Philip Elcan <pelcan@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-05-31 11:17:50 -07:00
Thomas Fleury
c6d51b20d5 gpu: nvgpu: unit: add unbind channel check_ctx_reload
Add test for nvgpu_tsg_unbind_channel_check_ctx_reload.
Check that force reload is done for other channel in TSG.

Jira NVGPU-3476

Change-Id: I1889442f81f2373127cc6db173a64eff6a07a981
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2123884
GVS: Gerrit_Virtual_Submit
Reviewed-by: Debarshi Dutta <ddutta@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-05-31 11:16:22 -07:00
Thomas Fleury
53b82d5a84 gpu: nvgpu: unit: add unbind channel check_hw_state
Add coverage for nvgpu_tsg_unbind_channel_check_hw_state.

Jira NVGPU-3476

Change-Id: Ie1fcea234bb234a757ce4cc3b21d51b7b13c4d03
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2123883
GVS: Gerrit_Virtual_Submit
Reviewed-by: Debarshi Dutta <ddutta@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-05-31 11:16:12 -07:00
Thomas Fleury
4fad611cb9 gpu: nvgpu: unit: add tsg bind/unbind coverage
Add coverage for
- nvgpu_tsg_bind_channel
- nvgpu_tsg_unbind_channel

Added pruning mechanism to skip subtests that attempt to test
some branches after a final branch.

Jira NVGPU-3476

Change-Id: I8e9a865055f36bc237a510ff93ab5385d430f5d1
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2121251
GVS: Gerrit_Virtual_Submit
Reviewed-by: Debarshi Dutta <ddutta@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-05-31 11:16:03 -07:00
Thomas Fleury
29fc98550b gpu: nvgpu: unit: add tsg open/release coverage
Added coverage for
- nvgpu_tsg_open
- nvgpu_tsg_release

In order to cover branch combinatorial, a bitmask is used.
For each branch, one bit indicates if the branch is taken or not.
A loop calls the tested function with all combinations.
We could afterwards prune some combinations for branches that
directly exit the function.

Set MM_UNIFIED_MEMORY feature to avoid allocating from vidmem.

Jira NVGPU-3476

Change-Id: If2e82eabfa492b4c9ec727e175f31b53fbb4f5f1
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2123156
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-05-31 11:15:53 -07:00
Alex Waterman
4dbbd8c488 gpu: nvgpu: userspace: disable all non-safe features
Add the ability to override an apparently non-safe profile build
with the safe profile. This let's us force the safety profile build
in the userspace build (make under userspace/) and the tmake build
used for unit testing. Doing this keeps the tmake build closer to
the userspace which helps prevent regressions in the userspace
build as it has no direct GVS coverage.

Change-Id: I00c000086aabf6a70b74cf5e052c80520653546a
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2123833
GVS: Gerrit_Virtual_Submit
Reviewed-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-05-30 17:06:01 -07:00
Alex Waterman
c28546d545 gpu: nvgpu: Remove `-v' from unit.sh on L4T
When running the unit tests on an L4T target in GVS the `-v' argument
is specified in the unit test framework. This results in many megabytes
of text logs getting dumped by the pd_cache tests. These logs consist
of seemingly endless:

  02:00     5: 00:55    27: nvgpu: gpu.USS       nvgpu_pd_cache_alloc_direct:165  [DBG ]  PD-Alloc [D] 4096 bytes
  02:00     5: 00:55    27: nvgpu: gpu.USS       nvgpu_pd_cache_alloc_direct:165  [DBG ]  PD-Alloc [D] 4096 bytes
  02:00     5: 00:55    27: nvgpu: gpu.USS       nvgpu_pd_cache_alloc_direct:165  [DBG ]  PD-Alloc [D] 4096 bytes
  02:00     5: 00:55    27: nvgpu: gpu.USS       nvgpu_pd_cache_alloc_direct:165  [DBG ]  PD-Alloc [D] 4096 bytes

This isn't very useful for debugging and generally clogs this log to
a point where finding error messages is really time consuming.

Change-Id: Idd0ee1bba7426448ed88f825344f7eddcb6b90ef
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2127436
GVS: Gerrit_Virtual_Submit
Reviewed-by: Nicolas Benech <nbenech@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-05-30 11:25:57 -07:00
Deepak Nibade
790cb6336e gpu: nvgpu: rename gv100 fuse unit test to tu104
gv100 is getting deprecated and hence rename gv100 fuse unit tests
and other support to tu104 dGPU

Bug 200496768

Change-Id: I7add2aee7d7ae2bb8552e6c14cfc292393ad407d
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2125840
GVS: Gerrit_Virtual_Submit
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2019-05-29 07:22:07 -07:00
Thomas Fleury
0a2bac5974 gpu: nvgpu: unit: add io callbacks for tegra fuses
Remove WAR to set FMODEL during gv11b_init_hal.
Instead, add io callbacks for tegra fuses, and return
GCPLEX_CONFIG_WPR_ENABLED_MASK for FUSE_GCPLEX_CONFIG_FUSE_0.

Jira NVGPU-3476

Change-Id: I0739d66668b0f5c6658346b67bc368682edda4da
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2120680
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-05-24 19:05:47 -07:00
Thomas Fleury
77a5d43365 gpu: nvgpu: unit: add USERMODE reg space
Added pre-populated register space for gv11b:
- NV_USERMODE 0x0081FFFF:0x00810000

Added clean up in case of failure when registering
gv11b register spaces.

Jira NVGPU-3476

Change-Id: Iee5790390a4b91f2f7440305d10177c890f12154
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2121252
GVS: Gerrit_Virtual_Submit
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-05-24 19:05:38 -07:00
Thomas Fleury
7b3950f224 gpu: nvgpu: unit: add FUSE reg space
Added pre-populated register space for gv11b:
- NV_FUSE 0x00021fff:0x00021000

Registers values were captured for Xavier on DDPX platform,
using reg_dump, after disabling railgating and ELPG.

Jira NVGPU-3476

Change-Id: Ic96f06501c3e903aef7ed635a88005332758bbb6
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2120663
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-05-24 19:05:29 -07:00
Thomas Fleury
12db97bd5c gpu: nvgpu: unit: add MASTER, CCSR and PBDMA reg spaces
Added pre-populated register spaces for gv11b:
- NV_PCCSR 0x0080FFFF:0x00800000
- NV_PMC 0x00000FFF:0x00000000
- NV_PPBDMA 0x0005FFFF:0x00040000

Registers values were captured for Xavier on DDPX platform,
using reg_dump, after disabling railgating and ELPG.

Also added missing reg space unregistration for NV_TOP.

Jira NVGPU-3476

Change-Id: I8745f820819c1201846472602d7ef1872583ef4e
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2120657
GVS: Gerrit_Virtual_Submit
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-05-24 19:05:20 -07:00