3 Commits

Author	SHA1	Message	Date
Deepak Nibade	e34b6f76d3	gpu: nvgpu: add clock gating support for HSHUB ... Add BLCG and SLCG clock gating support for HSHUB unit on gv11b and tu104 Register list for BLCG and SLCG is auto generated with scripts. Add HAL operations to enable/disable HSHUB clock gating Re-generate gv11b reglist so that all the manually commented registers are automatically deleted. Some of the unicast registers are also deleted. We already have corresponding broadcast registers present. Bug 2526212 Change-Id: I2654f158daa802bcf992e103ed4a44675aa5fd4d Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2150199 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>	2019-07-12 13:35:04 -07:00
Deepak Nibade	6fd983744d	gpu: nvgpu: update tu104 gating reglist ... Update tu104 gating reglist by running the auto-update script Bug 200521785 Change-Id: I85dad263932229956b60af108b5b40d8437613a4 Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2125845 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Alex Waterman <alexw@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>	2019-05-28 15:46:06 -07:00
Seema Khowala	937c6dcbad	gpu: nvgpu: move hal/cg to hal/power_features/cg ... This is to make the directory structure same under common and hal JIRA NVGPU-2014 Change-Id: Ibd5fc2bbfb3fb259386c2ddd8b03ecdb83d9d454 Signed-off-by: Seema Khowala <seemaj@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2036301 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>	2019-03-12 00:44:41 -07:00