3 Commits

Author	SHA1	Message	Date
Vedashree Vidwans	913a2d519f	gpu: nvgpu: ga10b: correct cbc base/top reg value ... CBC base and top values need to be left shifted by cbc_alignment factor to store in the CBC_BASE and CBC_TOP registers respectively. Fix cbc calculations accordingly. Update cbc information debug prints to print with gpu_dbg_info flag. Bug 3353418 Change-Id: I858c46a9dab1e5f810cabb327ba1797f15a2960e Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2574119 Reviewed-by: svc_kernel_abi <svc_kernel_abi@nvidia.com> Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com> Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> GVS: Gerrit_Virtual_Submit Tested-by: Seshendra Gadagottu <sgadagottu@nvidia.com> Tested-by: Bitan Biswas <bbiswas@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>	2021-08-14 06:24:40 -07:00
Vedashree Vidwans	a7a2e1e263	gpu: nvgpu: ga10b: update cbc divisor and top reg ... Currently, cbc init and compression tests are failing because MMU marks cbc to be not safe. - Modify cbc.get_base_divisor hal to use ltc_count = 1 for Tegra devices - Update fb.cbc_configure to write compbit_backing_size value to fb_mmu_cbc_top register. - After config confirm that CBC is marked safe. Bug 3353418 Change-Id: I1e9c27f47f7bfcf476f2499231951382e2e8653d Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2570550 Reviewed-by: Sami Kiminki <skiminki@nvidia.com> Reviewed-by: svc_kernel_abi <svc_kernel_abi@nvidia.com> Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: V M S Seeta Rama Raju Mudundi <srajum@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> GVS: Gerrit_Virtual_Submit	2021-08-05 22:33:56 -07:00
Sagar Kadamati	3e43f92f21	gpu: nvgpu: add ga10b & ga100 sources ... Mass copy ga10b & ga100 sources from nvgpu-next repo. TOP COMMIT-ID: 98f530e6924c844a1bf46816933a7fe015f3cce1 Jira NVGPU-4771 Change-Id: Ibf7102e9208133f8ef3bd3a98381138d5396d831 Signed-off-by: Sagar Kadamati <skadamati@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2524817 Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> Reviewed-by: svc_kernel_abi <svc_kernel_abi@nvidia.com> Reviewed-by: Debarshi Dutta <ddutta@nvidia.com> Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com> Reviewed-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> GVS: Gerrit_Virtual_Submit	2021-06-17 12:56:16 -07:00