Commit Graph

4 Commits

Author SHA1 Message Date
Lakshmanan M
6f24a76660 gpu: nvgpu: Add multiple engine and runlist support
This CL covers the following modification,
1) Added multiple engine_info support
2) Added multiple runlist_info support
3) Initial changes for ASYNC CE support
4) Added ASYNC CE interrupt support for
   Volta GPU series
5) Removed hard coded engine_id logic and
   made generic way
6) Code cleanup for readability

JIRA DNVGPU-26

Change-Id: Ief3b586ff3d9f492f0277243b2a94952bab48786
Signed-off-by: Lakshmanan M <lm@nvidia.com>
Reviewed-on: http://git-master/r/1156023
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-06-07 12:31:40 -07:00
Pritesh Raithatha
eafba025b2 gpu: nvgpu: gv11b: change kernel path
All kernel versions are getting moved inside $TOP/kernel folder.
Changing kernel paths accordingly.

Bug 200190733

Change-Id: I7dc6d1768151977fc60bacae34c2f8d839216351
Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com>
Reviewed-on: http://git-master/r/1143388
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2016-05-25 06:37:17 -07:00
Seshendra Gadagottu
c84ddceda6 gpu: nvgpu: gv11b: sm priv reg related changes
Included all basic ops for gv11b and updated
sm related functions to include new priv register
addresses.

Bug 1735757

Change-Id: Ie48651f918ee97fba00487111e4b28d6c95747f5
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: http://git-master/r/1126961
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-04-16 07:48:28 -07:00
Seshendra Gadagottu
55a5c57bc1 gpu: nvgpu: gv11b: added initial source code
Bug 1735757

Change-Id: Iea7488551a437afa0dfc005c87ad1b9ab9673b6c
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: http://git-master/r/1122123
GVS: Gerrit_Virtual_Submit
Reviewed-by: Ken Adams <kadams@nvidia.com>
2016-04-13 08:15:13 -07:00