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2 Commits

Author SHA1 Message Date
Mahantesh Kumbar
d40f3fb273 gpu: nvgpu: Handle MC pmu interrupts 
- Made changes to MC to get pmu interrrupts

Change-Id: I07aaec8392b1fbb34ae727bc7547a571aaeeb814
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: http://git-master/r/661212
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>
 2016-12-27 15:22:03 +05:30
Terje Bergstrom
0b50f2a202 gpu: nvgpu: Implement gp10b intr processing 
Bug 1567274

Change-Id: I2a6cef954b56d1f97208d29584e0748ec1c5e29d
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/591628
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
 2016-12-27 15:22:02 +05:30