Commit Graph

13 Commits

Author SHA1 Message Date
Konsta Holtta
f33935f426 gpu: nvgpu: provide usermode region via mmap
Add a mmap callback on the control device node for mapping the usermode
register region to userspace. Each such mapping is removed when the GPU
railgates, and brought back again on unrailgate.

The mapping offset must be 0 and its size must be 4 KB.

Bug 200145225

Change-Id: Ie8d3758da745b958376292691d7d1d02a24e7815
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1795819
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2018-10-29 08:04:25 -07:00
Konsta Holtta
d53495400e gpu: nvgpu: track opened Linux ctrl files
An upcoming patch will need to enumerate opened ctrl nodes; track them
in a list, protected by a mutex.

Bug 200145225

Change-Id: I50dc15056832a3bb53fbdd7bd2bffcdaecc7b21c
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1811840
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2018-10-29 08:04:16 -07:00
Debarshi Dutta
7e1dbd8303 gpu: nvgpu: move header location of gk20a.h
1) Update header path of gk20a.h files present in os/
to <nvgpu/gk20a.h>

2) os_fence_android_sema.c indirectly was dependent on gk20a.h via
semaphore.h. So, added #include <nvgpu/gk20a.h> in
os_fence_android_sema.c and replaced the header with forward
declaration of struct gk20a in semaphore.h

Jira NVGPU-597

Change-Id: I96e23befeb80713f3a399071eb5498f6f580211d
Signed-off-by: Debarshi Dutta <ddutta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1842868
Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2018-09-25 13:10:19 -07:00
Deepak Nibade
e16843c2ef gpu: nvgpu: read GPC mask from h/w
In gk20a_ctrl_ioctl_gpu_characteristics() we right now just calculate
GPC mask in s/w and return to user space
But this could give incorrect result as any GPC could be floorswept
in h/w

Add gops.fuse.fuse_status_opt_gpc() to read GPC floorsweep status
from fuse
Add gops.gr.get_gpc_mask() to get actual GPC mask from h/w

Set these HALs only for dGPUs right now. Fuse register to read GPC
mask is not yet supported in simulation and hence simulation boot fails
These HALs will be set for iGPU once simulation issue is resolved

Use gops.gr.get_gpc_mask() if it is defined in
gk20a_ctrl_ioctl_gpu_characteristics() to send the actual GPC mask
to user space

Jira NVGPUT-132

Change-Id: I3b552de07883328fcfa41d4334ec0d777e04bdd3
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1822811
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2018-09-24 10:14:56 -07:00
Konsta Holtta
34d552957d gpu: nvgpu: move channel header to common
channel_gk20a is clear from chip specifics and from most dependencies,
so move it under the common directory.

Jira NVGPU-967

Change-Id: I41f2160b96d4ec84064288ecc22bb360e82352df
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1810578
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2018-09-05 20:40:32 -07:00
Vinod G
bfe65407bd gpu: nvgpu: Read sm error ioctl support for tsg
Add READ_SM_ERROR IOCTL support to TSG level.
Moved the struct to save the sm_error details
from gr to tsg as the sm_error support is context
based, not global.

Also corrected MISRA 21.1 error in header file.

nvgpu_dbg_gpu_ioctl_write_single_sm_error_state and
nvgpu_dbg_gpu_ioctl_read_single_sm_error_state
functions are modified to use the tsg struct
nvgpu_tsg_sm_error_state.

Bug 200412642

Change-Id: I9e334b059078a4bb0e360b945444cc4bf1cc56ec
Signed-off-by: Vinod G <vinodg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1794856
Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2018-08-25 02:10:43 -07:00
Anup Mahindre
f5f1875b2a gpu: nvgpu: Deprecate NVGPU_GPU_IOCTL_INVAL_ICACHE
Deprecate NVGPU_GPU_IOCTL_INVAL_ICACHE as it is unused and has
a broken implementation.

Bug 200439908

Change-Id: Iab6f08cf3dd4853ba6c95cbc8443331bf505e514
Signed-off-by: Anup Mahindre <amahindre@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1800797
GVS: Gerrit_Virtual_Submit
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2018-08-17 18:49:36 -07:00
Debarshi Dutta
db7bb6548b gpu: nvgpu: remove clk_arb.h to gk20a.h circular dependency
clk_arb.h and gk20a.h has circular dependencies to each other. This is
removed by forward declaring struct gk20a in clk_arb.h and removing the
header gk20a.h from clk_arb.h and similarly forward declaring struct
nvgpu_clk_arb in gk20a.h and removing the header clk_arb.h from gk20a.h
alongwith putting headers in every execution unit which calls clk_arb.h
related methods.

JIRA NVGPU-597

Change-Id: I7cedca17206c148b21d93e5d7f0d88c2f98b979a
Signed-off-by: Debarshi Dutta <ddutta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1790915
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2018-08-08 20:14:16 -07:00
Richard Zhao
6c9daf7626 gpu: nvgpu: fix gpc_tpc_mask to use max_gpc_count
gpc_tpc_mask uses gpc/tpc IDs directly read from fuse, so it needs to
use max_gpc_count for any possible cases rather not gpc_count.

Bug 2302005

Change-Id: I903ee3e0c10c4b329dd0d76c40d3516dc36ed303
Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1790464
Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2018-08-06 17:36:26 -07:00
Vince Hsu
77dc80699c gpu: nvgpu: fix memleak when failed to power on gpu
nvmemleak detected memleak in the error path of gk20a_ctrl_dev_open.

nvkmemleak: Writing 'scan' to /sys/kernel/debug/kmemleak.
unreferenced object 0xffffffc0a6fffa80 (size 128):
  comm "nvgpu_gpu_zcull", pid 9675, jiffies 4294948258 (age 195.764s)
  hex dump (first 32 bytes):
    10 28 09 ba c0 ff ff ff 00 00 69 b2 c0 ff ff ff  .(........i.....
    00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
  backtrace:
    [<ffffff800824cec4>] __kmalloc+0x26c/0x308
    [<ffffff8000e70990>] __nvgpu_kzalloc+0x30/0x88 [nvgpu]
    [<ffffff8000e71f70>] gk20a_ctrl_dev_open+0x60/0x108 [nvgpu]
    [<ffffff800827ef20>] chrdev_open+0xb8/0x1d0
    [<ffffff8008274654>] do_dentry_open+0x224/0x330
    [<ffffff8008275c60>] vfs_open+0x58/0x90
    [<ffffff800828aeb4>] do_last+0x3e4/0xd98
    [<ffffff800828b90c>] path_openat+0xa4/0x2d8
    [<ffffff800828cf0c>] do_filp_open+0x84/0x108
    [<ffffff800827610c>] do_sys_open+0x164/0x278
    [<ffffff80082762a4>] SyS_openat+0x3c/0x50
    [<ffffff8008083600>] el0_svc_naked+0x34/0x38
    [<ffffffffffffffff>] 0xffffffffffffffff

Bug 200422739

Change-Id: I4ad03713ef5c8fc0e213bf4b649d38829a54a1ac
Signed-off-by: Vince Hsu <vinceh@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1777656
Reviewed-by: Debarshi Dutta <ddutta@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Tested-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2018-07-18 02:12:03 -07:00
Terje Bergstrom
26783b85bf gpu: nvpgu: Rename Linux specific vidmem code
Rename os/linux/vidmem.c to os/linux/dmabuf_vidmem.c. The code is
mainly dealing with interfacing with Linux dmabuf framework and its
responsibilities got confused with common/mm/vidmem.c.

Also move the header include/nvgpu/linux/vidmem.h to
os/linux/dmabuf_vidmem.h. It does not expose any interface to outside
Linux code.

Change-Id: I2cb1057a8934d5cb5c5860023aa12f8f048a6684
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1768261
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2018-07-05 21:48:56 -07:00
Konsta Holtta
26fe0fbc92 gpu: nvgpu: expose CAN_RAILGATE in characteristics
Bug 200327089

Change-Id: Id7bd2795647f1e29dabe41acb20d0994cdd07958
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1764267
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2018-07-04 04:42:10 -07:00
Terje Bergstrom
2a2c16af5f gpu: nvgpu: Move Linux files away from common
Move all Linux source code files to drivers/gpu/nvgpu/os/linux from
drivers/gpu/nvgpu/common/linux. This changes the meaning of common
to be OS independent.

JIRA NVGPU-598
JIRA NVGPU-601

Change-Id: Ib7f2a43d3688bb0d0b7dcc48469a6783fd988ce9
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1747714
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2018-06-15 17:47:31 -07:00