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12 Commits

Author SHA1 Message Date
Philip Elcan
d388e45d98 gpu: nvgpu: mm: fix CERT-C INT30 violations in mmu_fault 
Fix CERT-C INT30 violations in mmu_fault_gv11b.c. INT30 requires
checking for wrap when doing unsigned arithmetic. Use safe ops and
asserts to comply.

JIRA NVGPU-3628

Change-Id: I7f5024d1e95784e0ff3702c8da20e54233df468c
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2133799
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-06-12 14:17:05 -07:00
Philip Elcan
8f25fe41e2 gpu: nvgpu: mm: fix CERT-C STR30 violation in mmu_fault 
Fix CERT-C Rule STR30 violation for assigning string literal to
non-const pointer by changing the declaration.

JIRA NVGPU-3628

Change-Id: I804cf2e02c40b934a1575faa68a0cc3849927699
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2133798
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-06-12 14:16:50 -07:00
Sagar Kamble
3f08cf8a48 gpu: nvgpu: rename feature Make and C flags 
Name the Make and C flag variables consistently wih syntax:
CONFIG_NVGPU_<feature name>

s/NVGPU_DEBUGGER/CONFIG_NVGPU_DEBUGGER
s/NVGPU_CYCLESTATS/CONFIG_NVGPU_CYCLESTATS
s/NVGPU_USERD/CONFIG_NVGPU_USERD
s/NVGPU_CHANNEL_WDT/CONFIG_NVGPU_CHANNEL_WDT
s/NVGPU_FEATURE_CE/CONFIG_NVGPU_CE
s/NVGPU_GRAPHICS/CONFIG_NVGPU_GRAPHICS
s/NVGPU_ENGINE/CONFIG_NVGPU_FIFO_ENGINE_ACTIVITY
s/NVGPU_FEATURE_CHANNEL_TSG_SCHED/CONFIG_NVGPU_CHANNEL_TSG_SCHED
s/NVGPU_FEATURE_CHANNEL_TSG_CONTROL/CONFIG_NVGPU_CHANNEL_TSG_CONTROL
s/NVGPU_FEATURE_ENGINE_QUEUE/CONFIG_NVGPU_ENGINE_QUEUE
s/GK20A_CTXSW_TRACE/CONFIG_NVGPU_FECS_TRACE
s/IGPU_VIRT_SUPPORT/CONFIG_NVGPU_IGPU_VIRT
s/CONFIG_TEGRA_NVLINK/CONFIG_NVGPU_NVLINK
s/NVGPU_DGPU_SUPPORT/CONFIG_NVGPU_DGPU
s/NVGPU_VPR/CONFIG_NVGPU_VPR
s/NVGPU_REPLAYABLE_FAULT/CONFIG_NVGPU_REPLAYABLE_FAULT
s/NVGPU_FEATURE_LS_PMU/CONFIG_NVGPU_LS_PMU
s/NVGPU_FEATURE_POWER_PG/CONFIG_NVGPU_POWER_PG

JIRA NVGPU-3624

Change-Id: I8b2492b085095fc6ee95926d8f8c3929702a1773
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2130290
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-06-11 09:46:24 -07:00
Thomas Fleury
97762279b7 gpu: nvgpu: make nvgpu_init_mutex return void 
Make the nvgpu_init_mutex function return void.
In linux case, this doesn't affect anything since mutex_init
returns void.
For posix, we assert() and die if pthread_mutex_init fails.

This alleviates the need to error inject for _every_
nvgpu_mutex_init function in the driver.

Jira NVGPU-3476

Change-Id: Ibc801116dc82cdfcedcba2c352785f2640b7d54f
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2130538
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-06-05 10:25:52 -07:00
Seema Khowala
1e570d5a16 gpu: nvgpu: Add NVGPU_REPLAYABLE_FAULT compiler flag 
This flag is added to compile out replayable fault support for
safety build.

JIRA NVGPU-3514

Change-Id: I4ee56e6637a4fe70dd22ed91c1ebf1c53c29278d
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2124379
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-05-25 02:45:05 -07:00
Debarshi Dutta
4c30bd599f gpu: nvgpu: rename tsg_gk20a*/gk20a_tsg* functions. 
rename the functions with the prefixes tsg_gk20a*/gk20a_tsg*
to nvgpu_tsg_*

Jira NVGPU-3248

Change-Id: I9f5f601040d994cd7798fe76813cc86c8df126dc
Signed-off-by: Debarshi Dutta <ddutta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2120165
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-05-17 01:49:27 -07:00
Seema Khowala
671f1c8a36 gpu: nvgpu: channel MISRA fix for Rule 21.2 
Rename
_gk20a_channel_get -> nvgpu_channel_get__func
gk20a_channel_get -> nvgpu_channel_get
_gk20a_channel_put -> nvgpu_channel_put__func
gk20a_channel_put -> nvgpu_channel_put
trace_gk20a_channel_get -> trace_nvgpu_channel_get
trace_gk20a_channel_put -> trace_nvgpu_channel_put

JIRA NVGPU-3388

Change-Id: I4e37adddbb5ce14aa18132722719ca2f73f1ba52
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2114118
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-05-09 04:39:34 -07:00
Philip Elcan
93cfec16a9 gpu: nvgpu: mm: fix MISRA 21.2 in page_table 
MISRA rule 21.2 prohibits using __name for functions and identifiers.
Fix MISRA 21.2 violations in nvgpu.common.mm.gmmu.page_table.

JIRA NVGPU-3340

Change-Id: I8963ce4df96e4e9cf286135d87bfab7703d4f5bd
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2110595
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-05-07 21:38:02 -07:00
Alex Waterman
6de260dcfb gpu: nvgpu: Fixups for comment is new MM HAL code 
This fixes a few nits and issues in the comments of the MMU fault
and MM HAL headers.

JIRA NVGPU-2042

Change-Id: Ic4c5bf4bcc3c347e11f98a7cd746a7238919dc1e
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2113065
Reviewed-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Philip Elcan <pelcan@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-05-06 16:46:37 -07:00
Debarshi Dutta
17486ec1f6 gpu: nvgpu: rename tsg_gk20a and channel_gk20a structs 
rename struct tsg_gk20a to struct nvgpu_tsg and rename struct
channel_gk20a to struct nvgpu_channel

Jira NVGPU-3248

Change-Id: I2a227347d249f9eea59223d82f09eae23dfc1306
Signed-off-by: Debarshi Dutta <ddutta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2112424
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-05-06 02:56:53 -07:00
Alex Waterman
38c255c8a9 gpu: nvgpu: Rename gmmu_gmmu fault HALs 
Rename the gv11b_gmmu_* fault handling HALs to reflect their new
location under hal/mm/mmu_fault.

JIRA NVGPU-2042

Change-Id: I7ab8fe7ef922f36a907c45eeb210d72ff1447e4e
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2109694
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-05-03 16:26:17 -07:00
Alex Waterman
c053bc0226 gpu: nvgpu: Move gv11b MMU fault handling to HAL 
Move the gv11b MMU fault handling code into a new mm.mmu_fault HAL.
Also move the existing gmmu_mmu_fault HAL code into this HAL as they
are basically the same logical entity.

JIRA NVGPU-2042
JIRA NVGPU-1313

Change-Id: I41d3e180c762f191d4de3237e9052bdc456f9e4c
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2109693
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-05-03 16:26:07 -07:00