Commit Graph

12 Commits

Author SHA1 Message Date
Konsta Holtta
a5274c2bc7 gpu: nvgpu: gv11b: add PRAMIN support for mem accessors
JIRA DNVGPU-23

Change-Id: I47c8d89e65b9bdb30b1399728d51bba77c3929ae
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: http://git-master/r/1148389
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-05-24 12:39:19 -07:00
Terje Bergstrom
c3117bf337 gpu: nvgpu: gv11b: Use gp10b GR floorsweeping
Use gp10b version of GR floorsweeping function.

Change-Id: I5715672b5f94b779165f44c78aec14a2836928e7
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1144905
2016-05-16 10:58:23 -07:00
Lakshmanan M
6863c08cc6 gpu: nvgpu: Add support for multiple PBDMAs
Added support for multiple PBDMAs handling during
fifo_pbdma_isr and gk20a_init_fifo_reset_enable_hw
use case.

JIRA DNVGPU-26

Change-Id: I2e70c6f9a724899aaef179ae015149d7127f227b
Signed-off-by: Lakshmanan M <lm@nvidia.com>
Reviewed-on: http://git-master/r/1145603
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-05-13 09:39:23 -07:00
Konsta Holtta
d089e40235 gpu: nvgpu: refactor gk20a_mem_{wr,rd} for vidmem
To support vidmem, pass g and mem_desc to the buffer memory accessor
functions. This allows the functions to select the memory access method
based on the buffer aperture instead of using the cpu pointer directly
(like until now). The selection and aperture support will be in another
patch; this patch only refactors these accessors, but keeps the
underlying functionality as-is.

JIRA DNVGPU-23

Change-Id: Ie2cc17c4a0315d03a66e92fb635c217840d5399e
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: http://git-master/r/1128863
GVS: Gerrit_Virtual_Submit
Reviewed-by: Ken Adams <kadams@nvidia.com>
2016-05-13 07:12:04 -07:00
Deepak Nibade
c8b6a331d1 gpu: nvgpu: use preemption modes defined in nvgpu-t18x.h
Below definitions of preemption modes are deleted:
NVGPU_GR_PREEMPTION_MODE_GFXP
NVGPU_GR_PREEMPTION_MODE_CILP

Use new definitions defined in nvgpu-t18x.h
NVGPU_GRAPHICS_PREEMPTION_MODE_GFXP
NVGPU_COMPUTE_PREEMPTION_MODE_CILP

Bug 1646259

Change-Id: Ieff51e41ef34eb61357f95778c400c8a3fa330c8
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/1133597
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-by: Ken Adams <kadams@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-05-09 13:18:13 -07:00
Seshendra Gadagottu
e19ee13cc7 gpu: nvgpu: gv11b: set soc memory aperture type
For gv11b, set platform data for soc memory aperture type
to sysmem instead of vidmem.

Bug 1749338

Change-Id: I6632e79e3ca68c437e5b04f6865f8f0b6f2943ce
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: http://git-master/r/1129169
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Ken Adams <kadams@nvidia.com>
2016-04-23 05:21:11 -07:00
Seshendra Gadagottu
4f2b0494e4 gpu: nvgpu: gv11b: sysmem aperture for soc memory
In gv11b, soc memory needs to be accessed as sysmem instead of videmem.

Bug 1749338

Change-Id: I325c107958229cf717b0b0f18dd123597d1d7567
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: http://git-master/r/1128377
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Ken Adams <kadams@nvidia.com>
2016-04-19 08:56:13 -07:00
Seshendra Gadagottu
66f64c86a8 gpu: nvgpu: gv11b: fix sparse warnings
Fixed following sparse warnings:
drivers/gpu/nvgpu/gv11b/gv11b.c:21:5: warning:
symbol 'gv11b_init_gpu_characteristics' was not declared. Should it be static?
drivers/gpu/nvgpu/gv11b/hal_gv11b.c:36:5: warning:
symbol 'gv11b_init_hal' was not declared. Should it be static?
drivers/gpu/nvgpu/gv11b/gr_gv11b.c:766:5: warning:
symbol 'gr_gv11b_alloc_buffer' was not declared. Should it be static?

Bug 200088648

Change-Id: I327f9d69bf1853727d74d2c125cfab54c2f0e5b0
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: http://git-master/r/1128299
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Ken Adams <kadams@nvidia.com>
2016-04-19 08:55:16 -07:00
Seshendra Gadagottu
c84ddceda6 gpu: nvgpu: gv11b: sm priv reg related changes
Included all basic ops for gv11b and updated
sm related functions to include new priv register
addresses.

Bug 1735757

Change-Id: Ie48651f918ee97fba00487111e4b28d6c95747f5
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: http://git-master/r/1126961
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-04-16 07:48:28 -07:00
Seshendra Gadagottu
07cd80ab09 gpu: nvgpu: gv11b: header update related to sm
Updated priv registers related to sm re-organization

Bug 1735757

Change-Id: I5656f87c17fb3d95a162f06d96d29dab25d648f8
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: http://git-master/r/1126960
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-04-16 07:48:13 -07:00
Seshendra Gadagottu
55a5c57bc1 gpu: nvgpu: gv11b: added initial source code
Bug 1735757

Change-Id: Iea7488551a437afa0dfc005c87ad1b9ab9673b6c
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: http://git-master/r/1122123
GVS: Gerrit_Virtual_Submit
Reviewed-by: Ken Adams <kadams@nvidia.com>
2016-04-13 08:15:13 -07:00
Seshendra Gadagottu
548c95266c gpu: nvgpu: gv11b: add hw headers for gv11b
Add initial versions of header for gv11b

Bug 1735757

Change-Id: I76f85bbe98c1fa13c11d8ee1b2889703f62c6f67
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: http://git-master/r/1121486
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Ken Adams <kadams@nvidia.com>
2016-04-13 08:14:00 -07:00