Commit Graph

8 Commits

Author SHA1 Message Date
Kishan
a765a76c81 gpu:nvgpu: Expose physical gpc,tpc layout for ecc sysfs nodes.
Added new gr_config member to hold TPC physical id map.
Updated ecc stats structures to hold physical gpc,tpc
numbers. Previously logical id's were exposed via ecc
sysfs nodes.
Consumers of ecc sysfs nodes refer tpc_fs_mask which is
physical gpc/tpc layout whereas ecc sysfs nodes were updated
with logical gpc/tpc layout. This change ensures that both
use the same framework.

JIRA NVGPU-9607
Bug 3950378

Change-Id: I1f91956dd027ffdc12042dd33dc491a3ce1e1ff6
Signed-off-by: Kishan <kpalankar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2866264
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
2023-03-08 06:32:00 -08:00
V M S Seeta Rama Raju Mudundi
ab46ee3335 Revert "gpu:nvgpu: Expose physical gpc,tpc layout for ecc sysfs nodes."
This reverts commit 2cc098eae7.

Reason for revert: intermittent boot failures on drv-orin-f1 and 
frspr-f1 on both AV+L and AV+Q.

Bug 3998230

Change-Id: I230ba7ba469fde3f470dab7538cc757c99360d99
Signed-off-by: srajum <srajum@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2863208
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
2023-02-25 11:16:12 -08:00
Kishan
2cc098eae7 gpu:nvgpu: Expose physical gpc,tpc layout for ecc sysfs nodes.
Added new gr_config member to hold TPC physical id map.
Updated ecc stats structures to hold physical gpc,tpc
numbers. Previously logical id's were exposed via ecc
sysfs nodes.
Consumers of ecc sysfs nodes refer tpc_fs_mask which is
physical gpc/tpc layout whereas ecc sysfs nodes were updated
with logical gpc/tpc layout. This change ensures that both
use the same framework.

JIRA NVGPU-9607
Bug 3950378

Change-Id: Iac99951fc3aa9dde02e833109f32aa5bb37ea15f
Signed-off-by: Kishan <kpalankar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2855032
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
2023-02-22 00:42:23 -08:00
Sagar Kamble
40064ef1ec gpu: nvgpu: fix ecc counter free
ECC counter structures are freed without removing the node from the
stats_list. This can lead to invalid access due to dangling pointers.

Update the ecc counter free logic to set them to NULL upon free, to
remove them from stats_list and free them by validation.

Also updated some of the ecc init paths where error was not propa-
gated to callers and full ecc counters deallocation was not done.

Now, calling unit ecc_free from any context (with counters alloc-
ated or not) is harmless as requisite checks are in place.

bug 3326612
bug 3345977

Change-Id: I05eb6ed226cff9197ad37776912da9dcb7e0716d
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2565264
Tested-by: Ashish Mhetre <amhetre@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: svc_kernel_abi <svc_kernel_abi@nvidia.com>
Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
2021-08-11 01:55:08 -07:00
Deepak Nibade
2427d45102 gpu: nvgpu: initialize gr ecc counters for each instance
Add new API nvgpu_ecc_counter_init_per_gr() to initialize ECC counters
per GR instance.
Switch NVGPU_ECC_COUNTER_INIT_GR macro to use
nvgpu_ecc_counter_init_per_gr() instead of nvgpu_ecc_counter_init().

Fix error handling path in nvgpu_gr_alloc().

Jira NVGPU-5648

Change-Id: I18f1bf8b245956bdb5a3e4bb6b03114282366ce6
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2402025
Reviewed-by: automaticguardword <automaticguardword@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
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Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
2020-12-15 14:13:28 -06:00
vinodg
0c3a963275 gpu: nvgpu: update on gr.ecc subunit code
Change a check from CONFIG_NVGPU_NON_FUSA to CONFIG_NVGPU_DGPU
as the gpccount is more than 1 for DGPU and this code need to be
executed for DGPU.

Jira NVGPU-4460

Change-Id: I806c926cd787c787ac8a04f998602edcae5419b8
Signed-off-by: vinodg <vinodg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2257036
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2020-12-15 14:10:29 -06:00
vinodg
5a17ccb83f gpu: nvgpu: unit: test coverage for gr.ecc unit
Add more test for line/branch coverages in gr.ecc
common and fusa code.
Max gpc_count is one for gv11b, add a checking under
CONFIG_NVGPU_NON_FUSA to avoid unwanted error handling.

Jira NVGPU-4460

Change-Id: Ifac53394ebe58698b81e1e108731ccc36d624ff3
Signed-off-by: vinodg <vinodg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2256451
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2020-12-15 14:10:29 -06:00
Sagar Kamble
daf5475f50 gpu: nvgpu: split ecc support per GPU HW unit
To enable ecc interrupts early during nvgpu_finalize_poweron, ecc
support has to be enabled early. ecc support was being initialized
together for GR, LTC, PMU, FB units late in the poweron sequence.

Move the ecc init for each unit to respective unit's init functions.
And separate out the hal ecc functions from GR ecc unit to
respective hal units.

JIRA NVGPU-4336

Change-Id: I2c42fb6ba3192dece00be61411c64a56ce16740a
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2239153
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2020-12-15 14:10:29 -06:00