On dGPU so far we boot only at maximum GPC2CLK frequency. Expose that
as maximum clock rate to user space.
Bug 200251486
Change-Id: Ie3463782a0e36028074325ce652c7ef554f6ea2c
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1252907
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Shreshtha Sahu <ssahu@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
In the nvgpu_pci_devnode() function only set the mode if the mode
pointer is valid. In some cases this function only needs the name
of the node and not its permissions.
Bug 1816516
Change-Id: I603c1499083fb29cb5fe4a871068e0bf2cbe9c3d
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: http://git-master/r/1225614
(cherry picked from commit 11874ad9df49b44fac4e90d83e138ead63bbb2f9)
Reviewed-on: http://git-master/r/1244907
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
Add a minimum VBIOS version field for each SKU. This requires the
gk20a_platform structure to be per SKU.
Also sets power_on back to false if there was any error in booting
GPU.
Bug 1811880
Change-Id: I23ef312f0db7061b31a3d503ded7e41ef45ad6b3
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1227229
(cherry picked from commit 69c9ab4349ec7526a7f8a2fcad01f9128ed4769c)
Reviewed-on: http://git-master/r/1239428
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Add the known dGPU SKUs to the PCIe device id table, and remove the
wildcard ANY_GPU_ID wildcard. This makes nvgpu to not try to probe on unknown
GPUs.
JIRA DNVGPU-72
Change-Id: Ie32c3137e9fa89a9e6dcf1e578c0b9d7339d7e75
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1219129
(cherry picked from commit 5c56088fbf8cb815d8be3355ecbb597fb7bfc795)
Reviewed-on: http://git-master/r/1231042
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
We have completely different versions of probe for
nvgpu and pci device
Extract out common steps into nvgpu_probe() function
and separate it out in new file nvgpu_common.c
Divide task of nvgpu_probe() into further smaller
functions
Do platform specific things (like irq handling,
memresource management, power management) only in
individual probes and then call nvgpu_probe() to
complete the common initialization
Move all debugfs initialization to common gk20a_debug_init()
This also helps to bringup all debug nodes to pci device
Pass debugfs_symlink name as a parameter to gk20a_debug_init()
This allows us to set separate debugfs symlink for nvgpu
and pci device
In case of railgating, cde and ce debugfs, check if
platform supports them or not
Copy vidmem_is_vidmem from platform to mm structure
and set it to true for pci device
Return from gk20a_scale_init() if we don't have either of
governor or qos_notifier
Fix gk20a_alloc_debugfs_init() and gk20a_secure_page_alloc()
to receive device pointer instead of platform_device
Export gk20a_railgating_debugfs_init() so that we can call
it from gk20a_debug_init()
Jira DNVGPU-56
Jira DNVGPU-58
Change-Id: I3cc048082b0a1e57415a9fb8bfb9eec0f0a280cd
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/1204207
(cherry picked from commit add6bb0a3d5bd98131bbe6f62d4358d4d722b0fe)
Reviewed-on: http://git-master/r/1204462
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
While mapping the buffer, first check if buffer is in
vidmem, and if yes convert allocation into base address
And then walk through each chunk to decide the alignment
Add new API gk20a_mm_get_align() which returns the
alignment based on scatterlist and aperture, and use
this API to get alignment during mapping
Enable big page support for pci by unsetting disable_bigpage
Jira DNVGPU-97
Change-Id: I358dc98fac8103fdf9d2bde758e61b363fea9ae9
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/1207673
(cherry picked from commit d14d42290eed4aa7a2dd2be25e8e996917a58e82)
Reviewed-on: http://git-master/r/1210959
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Device nodes for PCI devices need to be RW for everybody.
Bug 200225622
Change-Id: I14de9d17f76ca45ba525d0c4f5e8d448bbfda98b
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1198556
(cherry picked from commit 60bf9118715b61b8cd3f2379479caf280ae4e35c)
Reviewed-on: http://git-master/r/1200713
Reviewed-by: Automatic_Commit_Validation_User
Added interface to allow kernel to create privileged CE channels for
page migration and clearing support between sysmem and videmem.
JIRA DNVGPU-53
Change-Id: I3e18d18403809c9e64fa45d40b6c4e3844992506
Signed-off-by: Lakshmanan M <lm@nvidia.com>
Reviewed-on: http://git-master/r/1173085
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Add static qualifier to nvgpu_pci_pm_init, as it is
only used within the current file.
Bug 200067946
Bug 200088648
Change-Id: Ifb7d3ec174a9f8eea0ac53421c953761886f48c6
Signed-off-by: Sachit Kadle <skadle@nvidia.com>
Reviewed-on: http://git-master/r/1181867
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Tested-by: Sachin Nikam <snikam@nvidia.com>
Enable runtime power management ops for PCIe devices, and
move gk20a_pm_finalize_poweron call into the resume routine.
This change only implements suspend as a stub, as suspend/resume
has not yet been verified for dGPU
Bug 1785512
Bug 200187507
Change-Id: I076bafc03c6b4ba10dce874804ed3fd0b9c7b0d8
Signed-off-by: Sachit Kadle <skadle@nvidia.com>
Reviewed-on: http://git-master/r/1179860
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: Thomas Fleury <tfleury@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
following compilation error are reported with CONFIG_DEBUG_FS=n:
pci.c:246:7: error: 'struct mm_gk20a' has no member named 'ltc_enabled'
pci.c:247:7: error: 'struct mm_gk20a' has no member named 'ltc_enabled_debug'
possible compilation error(reported sometime):
gk20a_allocator.c:1163:13: error: 'gk20a_alloc_debugfs_init' defined
but not used
fixed by adding '#ifdef CONFIG_DEBUG_FS' for debug only code.
following variables from gk20a.c are not initialized from
CONFIG_DEBUG_FS=n path, it will cause kernel oops when booting:
gk20a->mm.bypass_smmu = platform->bypass_smmu;
gk20a->mm.disable_bigpage = platform->disable_bigpage;
gk20a->mm.has_physical_mode = true;
fix it by move them out from '#ifdef CONFIG_DEBUG_FS' section.
Bug 1778001
Change-Id: Ic2da36b3f500882748ee46a5150903244b697761
Signed-off-by: David Pu <dpu@nvidia.com>
Reviewed-on: http://git-master/r/1167358
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
To be able to scan, PCI devnodes need to be in a directory with read
permission. By default /dev is read protected by SELinux policy. Move
the devnodes to their own directory so that reading this one
directory can be allowed.
At the same time rename the nodes to start with string "card-".
JIRA DNVGPU-54
Change-Id: I0df4ced08afd1f3a468e983d07395ffcb8050365
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1152745
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
GVS: Gerrit_Virtual_Submit
Big pages are not supported by all dGPUs on sysmem. Disable support
for all dGPUs for now.
Change-Id: I7bdcd9b18845c3d32d40e33220bf9afaf2d8c28e
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1150547
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
Watchdog timeout is now zero for PCIe devices. This makes also
semaphore acquire timeout to be zero. Fix the timeout to be the
same as for platform devices.
JIRA DNVGPU-7
Change-Id: I5c2921b65f4f957c08a4e9f815deeed2ba231013
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1134441
Use device name to distinguish between different instances of PCIe
devices.
JIRA DNVGPU-7
Change-Id: Ice0a9dae41396c8faada1815afd1237907896036
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1140685
Reviewed-by: Sami Kiminki <skiminki@nvidia.com>
GVS: Gerrit_Virtual_Submit
