Commit Graph

41 Commits

Author SHA1 Message Date
Peter Daifuku
1ba169d7db Revert "Revert "gpu: nvgpu: vgpu: alloc hwpm ctxt buf on client""
This reverts commit 5f1c2bc27f.

Added back now that matching RM server has been updated:

In hypervisor mode, all GPU VA allocations must be done by client;
fix this for the allocation of the hwpm ctxt buffer

Bug 200231611

Change-Id: Ie5ce2c2562401b1f00821231d37608e3fc30d4a4
Signed-off-by: Peter Daifuku <pdaifuku@nvidia.com>
Reviewed-on: http://git-master/r/1252138
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-11-14 15:04:22 -08:00
Terje Bergstrom
8fa5e7c58a gpu: nvgpu: Remove IOCTL FREE_OBJ_CTX
We have never used the IOCTL FREE_OBJ_CTX. Using it leads to context
being only partially available, and can lead to use-after-free.

Bug 1834225

Change-Id: I9d2b632ab79760f8186d02e0f35861b3a6aae649
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1250004
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2016-11-11 11:47:42 -08:00
Sivaram Nair
5f1c2bc27f Revert "gpu: nvgpu: vgpu: alloc hwpm ctxt buf on client"
This reverts commit 57821e2157.

Change-Id: Ic4801115064ccbcd1435298a61871921d056b8ea
Signed-off-by: Sivaram Nair <sivaramn@nvidia.com>
Reviewed-on: http://git-master/r/1247825
Reviewed-by: Rakesh Babu Bodla <rbodla@nvidia.com>
Tested-by: Rakesh Babu Bodla <rbodla@nvidia.com>
2016-11-04 08:34:18 -07:00
Peter Daifuku
57821e2157 gpu: nvgpu: vgpu: alloc hwpm ctxt buf on client
In hypervisor mode, all GPU VA allocations must be done by client;
fix this for the allocation of the hwpm ctxt buffer

Bug 200231611

Change-Id: I0270b1298308383a969a47d0a859ed53c20594ef
Signed-off-by: Peter Daifuku <pdaifuku@nvidia.com>
Reviewed-on: http://git-master/r/1240913
(cherry picked from commit 49314d42b13e27dc2f8c1e569a8c3e750173148d)
Reviewed-on: http://git-master/r/1245867
(cherry picked from commit d0b10e84d90d0fd61eca8be0f9e879d9cec71d3e)
Reviewed-on: http://git-master/r/1246700
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-11-03 10:35:12 -07:00
Peter Daifuku
9aa7de15c2 gpu: nvgpu: vgpu: cyclestat snapshot support
Add support for cyclestats snapshots in the virtual case

Bug 1700143
JIRA EVLR-278

Change-Id: I376a8804d57324f43eb16452d857a3b7bb0ecc90
Signed-off-by: Peter Daifuku <pdaifuku@nvidia.com>
Reviewed-on: http://git-master/r/1211547
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-09-08 16:04:09 -07:00
Richard Zhao
5d4319ad28 gpu: nvgpu: vgpu: add channel wdt support
- avoid dump gr registers for vgpu
- init wdt lock

Bug 1776876
JIRA VFND-2151

Change-Id: I73293e0d23b614129c763cb22b09156a8e1432cc
Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-on: http://git-master/r/1202256
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-08-18 15:03:56 -07:00
Richard Zhao
deffbf8ee2 gpu: nvgpu: vgpu: get constants of gpc_tpc_count/mask arrays
It'll cover multi-gpcs.

JIRA VFND-2103

Change-Id: Ie82bdaad360294696c5a679d694f6f0e2364ca2e
Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-on: http://git-master/r/1194631
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vladislav Buzov <vbuzov@nvidia.com>
2016-08-15 11:41:25 -07:00
Richard Zhao
ead3148816 gpu: nvgpu: vgpu: add getting gr constants
move below attributes to constants:
TEGRA_VGPU_ATTRIB_GPC_COUNT
TEGRA_VGPU_ATTRIB_MAX_TPC_PER_GPC_COUNT
TEGRA_VGPU_ATTRIB_MAX_TPC_COUNT
TEGRA_VGPU_ATTRIB_NUM_FBPS
TEGRA_VGPU_ATTRIB_FBP_EN_MASK
TEGRA_VGPU_ATTRIB_MAX_LTC_PER_FBP
TEGRA_VGPU_ATTRIB_MAX_LTS_PER_LTC

JIRA VFND-2103

Change-Id: Ic2ac14a0f8a1cf19a996bcef20bef0003d3b9a3b
Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-on: http://git-master/r/1194630
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vladislav Buzov <vbuzov@nvidia.com>
2016-08-15 11:41:24 -07:00
Richard Zhao
843bbc726c gpu: nvgpu: vgpu: add getting sm version constants
move below attributes to constants:
TEGRA_VGPU_ATTRIB_GPC0_TPC0_SM_ARCH

JIRA VFND-2103

Change-Id: I5d6aa8f4a49e65307989ef02d223c3ee31fcdeed
Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-on: http://git-master/r/1190481
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vladislav Buzov <vbuzov@nvidia.com>
2016-08-15 11:41:23 -07:00
Richard Zhao
47fe8460e9 gpu: nvgpu: vgpu: add getting constants golden img size and zcull ctx size
JIRA VFND-2103

Change-Id: I180324b36a1c6b39300b92a2cff6448d7665679b
Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-on: http://git-master/r/1190479
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vladislav Buzov <vbuzov@nvidia.com>
2016-08-15 11:41:20 -07:00
Richard Zhao
e1438818b9 gpu: nvgpu: vgpu: add vgpu private data and helper functions
Move vgpu private data to a dedicated structure and allocate it
at probe time. Also add virt_handle helper function which is used
everywhere.

JIRA VFND-2103

Change-Id: I125911420be72ca9be948125d8357fa85d1d3afd
Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-on: http://git-master/r/1185206
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vladislav Buzov <vbuzov@nvidia.com>
2016-08-15 11:41:16 -07:00
Richard Zhao
d707c5a444 gpu: nvgpu: add tsg support for vgpu
- make tsg_gk20a.c call HAL for enable/disable channels
- add preempt_tsg HAL callbacks
- add tsg bind/unbind channel HAL callbacks
- add according tsg callbacks for vgpu

Bug 1702773
JIRA VFND-1003

Change-Id: I2cba74b3ebd3920ef09219a168e6433d9574dbe8
Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-on: http://git-master/r/1144932
(cherry picked from commit c3787de7d38651d46969348f5acae2ba86b31ec7)
Reviewed-on: http://git-master/r/1126942
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-05-31 10:47:22 -07:00
Richard Zhao
a71ce831fb gpu: nvgpu: vgpu: manage gr_ctx as independent resource
gr_ctx will managed as independent resource in RM server
and vgpu can get a gr_ctx handle.

Bug 1702773

Change-Id: I87251af61711f0d7997ce90df8a3de196a9b481a
Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-on: http://git-master/r/1144931
(cherry picked from commit 2efbd143adaf60570121f1c212dc6b6f3d5a1661)
Reviewed-on: http://git-master/r/1150704
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-05-31 10:46:33 -07:00
Peter Daifuku
a21e56d584 gpu: nvgpu: vgpu: add support for VSM ioctls
Add virtualized support for NUM_VSMS and VSMS_MAPPING ioctls.

This requires adding an attribute request for the RM server, GPC0_TPC_COUNT

JIRASW EVLR-253

Change-Id: Icaab4fadbbc9eab5d00cf78132928686944162df
Signed-off-by: Peter Daifuku <pdaifuku@nvidia.com>
Reviewed-on: http://git-master/r/1130615
(cherry picked from commit 78514079382b0de48457db340e3479e99a012040)
Reviewed-on: http://git-master/r/1133865
(cherry picked from commit 27a8e645e2787a43d0073f0be6e8f64c0f183228)
Reviewed-on: http://git-master/r/1122553
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-05-20 13:38:13 -07:00
Peter Daifuku
6eeabfbdd0 gpu: nvgpu: vgpu: virtualized SMPC/HWPM ctx switch
Add support for SMPC and HWPM context switching when virtualized

Bug 1648200
JIRASW EVLR-219
JIRASW EVLR-253

Change-Id: I80a1613eaad87d8510f00d9aef001400d642ecdf
Signed-off-by: Peter Daifuku <pdaifuku@nvidia.com>
Reviewed-on: http://git-master/r/1122034
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-04-08 12:34:50 -07:00
Deepak Nibade
16658fd39d gpu: nvgpu: post BPT_INT/PAUSE and BLOCKING_SYNC events
Post EVENT_ID_BPT_INT when bpt.int is pending
Post EVENT_ID_BPT_PAUSE when bpt.pause is pending
Post EVENT_ID_BLOCKING_SYNC whenever there is
non-stalling semaphore interrupt indicating work
completion from GR/CE2 engine

Bug 200089620

Change-Id: I91b7bf48f8585f0d318298fc0c4a66d42055f0a7
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/1112274
(cherry picked from commit d2b744b1f9acac56435cd7e7ab9a7a845579ef24)
Reviewed-on: http://git-master/r/1120321
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-04-07 08:45:47 -07:00
Deepak Nibade
e87ba53235 gpu: nvgpu: add channel event id support
With NVGPU_IOCTL_CHANNEL_EVENTS_CTRL, nvgpu can
raise events to User space. But user space
cannot distinguish between various types of events.
To overcome this, we need finer-grained API to
deliver various events to user space.

Remove old API NVGPU_IOCTL_CHANNEL_EVENTS_CTRL,
and all the support for this API (we can remove
this since User space has not started using this
API at all)

Add new API NVGPU_IOCTL_CHANNEL_EVENT_ID_CTRL
which will accept an event_id (like BPT.INT or
BPT.PAUSE), a command to enable the event,
and return a file descriptor on which
we can raise the event (if cmd=enable)
Event is disabled when file descriptor is closed

Add file operations "gk20a_event_id_ops"
to support polling on event fd

Also add API gk20a_channel_get_event_data_from_id()
to get event_data of event from its id

Bug 200089620

Change-Id: I5288f19f38ff49448c46338c33b2a927c9e02254
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/1030775
(cherry picked from commit 5721ce2735950440bedc2b86f851db08ed593275)
Reviewed-on: http://git-master/r/1120318
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2016-04-07 08:43:49 -07:00
Deepak Nibade
d4a2cd5c66 gpu: nvgpu: fix read after free
Fix coverity issue of  "Read from pointer after free"
Coverity id : 20418

Bug 200116059

Change-Id: Id7439986b4380ea427ffedf601455272c4c15a65
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/1011296
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
2016-02-16 04:33:45 -08:00
Konsta Holtta
db7095ce51 gpu: nvgpu: bitmap allocator for comptags
Restore comptags to be bitmap-allocated, like they were before we had
the buddy allocator.

The new buddy allocator introduced by
e99aa2485f8992eabe3556f3ebcb57bdc8ad91ff (originally
6ab2e0c49cb79ca68d2f83f1d4610783d2eaa79b) is fine for the big VAs, but
unsuitable for the small compbit store.

This commit reverts partially the combination of the above commit and
also one after it, 86fc7ec9a05999bea8de320840b962db3ee11410, that fixed
a bug which is not present when using a bitmap. With a bitmap allocator,
pruning the extra allocation necessary for user-mapped mode is possible,
so that is also restored.

The original generic bitmap allocator is not restored; instead, a
comptag-only allocator is introduced.

Bug 200145635

Change-Id: I87f3a911826a801124cfd21e44857dfab1c3f378
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: http://git-master/r/837180
(cherry picked from commit 5a504aeb54f3e89e6561932971158a397157b3f2)
Reviewed-on: http://git-master/r/839742
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-01-19 17:44:27 -08:00
Deepak Nibade
43de9024fe gpu: nvgpu: API to post channel events
Add new API gk20a_channel_post_event() which adds
channel event and also calls wake_up() for channel's
semaphore wq

Bug 200156699

Change-Id: If56f1bf8edcce79c9248809f8476ed853b7d2d9d
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/927132
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-01-12 23:00:46 -08:00
Richard Zhao
476447ec55 gpu: nvgpu: vgpu: add SM exception support
When TEGRA_VGPU_GR_INTR_SM_EXCEPTION comes, post
debugger event.

Bug 1594604
JIRA VFND-1120

Change-Id: I7229c3994220a7c6f117d38a1af2e766187a47c6
Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-on: http://git-master/r/923234
(cherry picked from commit bdd414d9366133380a202d88b1a50038b70c068d)
Reviewed-on: http://git-master/r/840646
Reviewed-by: Aingara Paramakuru <aparamakuru@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vladislav Buzov <vbuzov@nvidia.com>
2016-01-10 20:06:34 -08:00
Richard Zhao
942936bae0 gpu: nvgpu: vgpu: add set sm debug mode support
JIRA VFND-1006
Bug 1594604

Change-Id: If6eb7ae22b5b0557faddd3d68deb791abb24bec4
Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-on: http://git-master/r/923233
(cherry picked from commit 9e14ca393c3044be702c50524a9ef3a2c3a6270c)
Reviewed-on: http://git-master/r/841866
Reviewed-by: Aingara Paramakuru <aparamakuru@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vladislav Buzov <vbuzov@nvidia.com>
2016-01-10 20:06:12 -08:00
Terje Bergstrom
e04e73c580 gpu: nvgpu: Immediate channel release
When closing channel, disable and preempt it immediately instead of
waiting for it to finish all work.

Bug 1683059

Change-Id: Ia5f5fc6a072dc3ddb1e9bf63534814ff0a60b5b4
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/836746
2015-12-10 08:38:20 -08:00
Terje Bergstrom
37255d42cc gpu: nvgpu: vgpu: Alloc kernel address space
JIRA VFND-890

Change-Id: I8eba041b663cead94f2cc3d75d6458d472f1a755
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-on: http://git-master/r/815378
(cherry picked from commit 4b52329e955758ec4368abcb463ce4e3a2653237)
Reviewed-on: http://git-master/r/820499
2015-10-22 09:27:30 -07:00
Aingara Paramakuru
fb3a1d31cd gpu: nvgpu: vgpu: fix notification handling
Take a channel ref when handling a notification from
the server, to prevent the channel from being closed.

Also, mark the channel as faulted before calling
g20a_channel_abort, to keep the semantics the same
as the native driver.

Bug 1653186

Change-Id: I0cb8ce7bad22a4d508eade6ff63a412296a02fc9
Signed-off-by: Aingara Paramakuru <aparamakuru@nvidia.com>
Reviewed-on: http://git-master/r/811885
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: http://git-master/r/817021
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2015-10-22 07:40:08 -07:00
Aingara Paramakuru
ee18a3ae26 gpu: nvgpu: vgpu: re-factor gr ctx management
Move the gr ctx management to the GPU HAL. Also,
add support for a new interface to allocate gr ctxsw
buffers.

Bug 1677153

Change-Id: I5a7980acf4de0de7dbd94b7dd20f91a6196dc989
Signed-off-by: Aingara Paramakuru <aparamakuru@nvidia.com>
Reviewed-on: http://git-master/r/806961
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: http://git-master/r/817009
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2015-10-22 07:39:56 -07:00
Aingara Paramakuru
39e8bff2fc gpu: nvgpu: vgpu: T18x support
Add vgpu framework and build for T18x.

Bug 1677153
JIRA VFND-693

Change-Id: Icf9fd8e0b5769228aee59c54f9b000b992e5fcca
Signed-off-by: Aingara Paramakuru <aparamakuru@nvidia.com>
Reviewed-on: http://git-master/r/792559
Reviewed-on: http://git-master/r/806178
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
2015-09-29 08:12:15 -07:00
Richard Zhao
a88e58cc9d gpu: nvgpu: vgpu: add t210 gm20b support
- add hal initializaiton
- create folders vgpu/gk20a and vgpu/gm20b for specific code

Bug 1653185

Change-Id: If94d45e22a1d73d2e4916673736cc29751be4e40
Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-on: http://git-master/r/774148
GVS: Gerrit_Virtual_Submit
Reviewed-by: Aingara Paramakuru <aparamakuru@nvidia.com>
Reviewed-by: Ken Adams <kadams@nvidia.com>
2015-08-19 05:12:00 -07:00
Aingara Paramakuru
788776c9aa gpu: nvgpu: vgpu: support additional notifications
Client notification support is now added for the following:
- stalling and non-stalling GR sema release
- non-stalling FIFO channel intr
- non-stalling CE2 nonblockpipe intr

Bug 200097077

Change-Id: Icd3c076d7880e1c9ef1fcc0fc58eed9f23f39277
Signed-off-by: Aingara Paramakuru <aparamakuru@nvidia.com>
Reviewed-on: http://git-master/r/736064
(cherry picked from commit 0585d1f14d5a5ae1ccde8ccb7b7daa5593b3d1bc)
Reviewed-on: http://git-master/r/759824
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2015-06-22 08:56:36 -07:00
Richard Zhao
df67ff6a75 gpu: nvgpu: add zbc support to vgpu
For both adding and querying zbc entry, added callbacks in gr ops.
Native gpu driver (gk20a) and vgpu will both hook there. For vgpu, it
will add or query zbc entry from RM server.

Bug 1558561

Change-Id: If8a4850ecfbff41d8592664f5f93ad8c25f6fbce
Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-on: http://git-master/r/732775
(cherry picked from commit a3787cf971128904c2712338087685b02673065d)
Reviewed-on: http://git-master/r/737880
(cherry picked from commit fca2a0457c968656dc29455608f35acab094d816)
Reviewed-on: http://git-master/r/753278
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
2015-06-06 07:24:40 -07:00
Terje Bergstrom
2204f2a524 gpu: nvgpu: Use common allocator for patch
Reduce amount of duplicate code around memory allocation by using
common helpers, and common data structure for storing results of
allocations.

Bug 1605769

Change-Id: Idf51831e8be9cabe1ab9122b18317137fde6339f
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/721030
Reviewed-on: http://git-master/r/737530
Reviewed-by: Alexander Van Brunt <avanbrunt@nvidia.com>
Tested-by: Alexander Van Brunt <avanbrunt@nvidia.com>
2015-05-05 13:57:34 -07:00
Terje Bergstrom
1b7b271980 gpu: nvgpu: Use common allocator for context
Reduce amount of duplicate code around memory allocation by using
common helpers, and common data structure for storing results of
allocations.

Bug 1605769

Change-Id: I10c226e2377aa867a5cf11be61d08a9d67206b1d
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/720507
2015-04-04 19:17:24 -07:00
Aingara Paramakuru
f45d33e5f2 gpu: nvgpu: vgpu: add new attributes
Add support for reading num FBPs and FBP enable mask.

Bug 1621056

Change-Id: I92ec1123373308ed280d4ffd30fe77ae6073ac45
Signed-off-by: Aingara Paramakuru <aparamakuru@nvidia.com>
Reviewed-on: http://git-master/r/715826
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2015-04-04 18:59:50 -07:00
Haley Teng
05295a6824 gpu: nvgpu: vgpu: implement to initialize gr->gpc_tpc_mask
Bug 1509609

Change-Id: Ia78bd49518b41bc9f59e3d47a1390b126c7a2230
Signed-off-by: Haley Teng <hteng@nvidia.com>
Reviewed-on: http://git-master/r/706861
Reviewed-by: Aingara Paramakuru <aparamakuru@nvidia.com>
Reviewed-by: Jubeom Kim <jubeomk@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2015-04-04 18:09:18 -07:00
Aingara Paramakuru
624d7a2830 gpu: nvgpu: vgpu: handle fifo and gr exceptions
Handle the gr and fifo exceptions delivered from the server
and update the channel state as needed.

Bug 1551865

Change-Id: Ie19626c6e8a72f92ffd134983fe6d84e5c6c8736
Signed-off-by: Aingara Paramakuru <aparamakuru@nvidia.com>
Reviewed-on: http://git-master/r/670329
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2015-04-04 18:03:43 -07:00
Terje Bergstrom
383f176a9d gpu: nvgpu: Submit coverity fixes
Clear ioctl buffer and fix double free, and error case memory leak.

Bug 200059216

Change-Id: I21cc2b0f6a7e8fca09f72caf4c54d570b13f400b
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/655347
2015-03-18 12:12:25 -07:00
Aingara Paramakuru
0cc118c08c gpu: nvgpu: vgpu: fix crash during init
gops->gr.detect_sm_arch was not populated for vgpu. Also,
populate some members of the PMU VM struct as they are used
to report GPU characteristics to userspace.

Bug 1576949

Change-Id: I9ddc361d1418b942da97a82b553aac81f5f51182
Signed-off-by: Aingara Paramakuru <aparamakuru@nvidia.com>
Reviewed-on: http://git-master/r/601931
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2015-03-18 12:12:13 -07:00
Sam Payne
8c6a9fd115 Revert "gpu: nvgpu: GR and LTC HAL to use const structs"
This reverts commit 41b82e97164138f45fbdaef6ab6939d82ca9419e.

Change-Id: Iabd01fcb124e0d22cd9be62151a6552cbb27fc94
Signed-off-by: Sam Payne <spayne@nvidia.com>
Reviewed-on: http://git-master/r/592221
Tested-by: Hoang Pham <hopham@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Mitch Luban <mluban@nvidia.com>
2015-03-18 12:11:56 -07:00
Terje Bergstrom
2d5ff668cb gpu: nvgpu: GR and LTC HAL to use const structs
Convert GR and LTC HALs to use const structs, and initialize them
with macros.

Bug 1567274

Change-Id: Ia3f24a5eccb27578d9cba69755f636818d11275c
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/590371
2015-03-18 12:11:54 -07:00
Aingara Paramakuru
47caf9f7f5 gpu: nvgpu: vgpu: fix build break
Switch struct definitions to use nvgpu version instead of
nvhost one.

Bug 1509608

Change-Id: Id8c1b0c198536766f0399437bdf2c35c6a6bfe85
Signed-off-by: Aingara Paramakuru <aparamakuru@nvidia.com>
Reviewed-on: http://git-master/r/554027
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2015-03-18 12:11:39 -07:00
Aingara Paramakuru
1fd722f592 gpu: nvgpu: support gk20a virtualization
The nvgpu driver now supports using the Tegra graphics virtualization
interfaces to support gk20a in a virtualized environment.

Bug 1509608

Change-Id: I6ede15ee7bf0b0ad8a13e8eb5f557c3516ead676
Signed-off-by: Aingara Paramakuru <aparamakuru@nvidia.com>
Reviewed-on: http://git-master/r/440122
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
2015-03-18 12:11:01 -07:00