Commit Graph

61 Commits

Author SHA1 Message Date
Konsta Holtta
18a0178659 gpu: nvgpu: refactor gk20a_mem_{wr,rd} for vidmem
To support vidmem, pass g and mem_desc to the buffer memory accessor
functions. This allows the functions to select the memory access method
based on the buffer aperture instead of using the cpu pointer directly
(like until now). The selection and aperture support will be in another
patch; this patch only refactors these accessors, but keeps the
underlying functionality as-is.

JIRA DNVGPU-23

Change-Id: I21d4a54827b0e2741012dfde7952c0555a583435
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: http://git-master/r/1121914
GVS: Gerrit_Virtual_Submit
Reviewed-by: Ken Adams <kadams@nvidia.com>
2016-12-27 15:26:15 +05:30
Terje Bergstrom
ae893b37c0 gpu: nvgpu: gp10b: Use sysmem aperture for SoC memory
In Tegra GPU, SoC memory has to be accessed as vidmem. In discrete GPU, it
has to be accessed as sysmem.

Change-Id: Id26588df17b4921533804f72bc8c0ac3892ae154
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1122591
GVS: Gerrit_Virtual_Submit
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Tested-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
2016-12-27 15:22:12 +05:30
Richard Zhao
5dcbe39a71 gpu: nvgpu: enable semaphore acquire timeout for gp10b
It'll detect dead semaphore acquire. The worst case is when
ACQUIRE_SWITCH is disabled, semaphore acquire will poll and
consume full gpu timeslicees.

The timeout value is set to half of channel WDT.

Bug 1636800

Change-Id: Idbd4bfa52981e8a849b62a168e3a6828330112f5
Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-on: http://git-master/r/928830
Reviewed-by: Aingara Paramakuru <aparamakuru@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-12-27 15:22:10 +05:30
Terje Bergstrom
d42ca3a0fc gpu: nvgpu: gp10b: Lazy sync point update
Update sync point protection field only when we have a valid sync
point id, and the new id is different from old id.

Bug 1653328

Change-Id: Ie07e26f8abd7c8239ad562603b62fda00164cbc7
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/757102
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
2016-12-27 15:22:06 +05:30
Terje Bergstrom
c25a2ac26e gpu: nvgpu: Disable channel when writing syncpt id
Kick channel off PBDMA before writing new sync point id to allowed
sync points.

Bug 1648297
Bug 1646477

Change-Id: I7c686d474c403fdd54bc64cff63b7d049feecb4d
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/750981
2016-12-27 15:22:06 +05:30
Terje Bergstrom
4d30fe5a24 gpu: nvgpu: gp10b: Use correct PBDMA sig
Change-Id: Ic71ff2408bd01a1bf5cf1354453a2fe715438cf0
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/751555
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
2016-12-27 15:22:06 +05:30
Seshendra Gadagottu
65ef5bc238 gpu:nvgpu: gp10b: update channel_setup_ramfc
Enable re-playable faults based on characteristics
flags passed in channel_setup_ramfc.

Bug 1645628

Change-Id: I7176efb3e5af9fefe5fb92cd5b49eb295e8e2c4a
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: http://git-master/r/743382
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-12-27 15:22:06 +05:30
Terje Bergstrom
607b864976 gpu: nvgpu: Implement syncpt protection
Change-Id: I05b2554588e5e1001cdbb54551cf8a064ea531bd
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/711303
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
2016-12-27 15:22:05 +05:30
Terje Bergstrom
e1339b8589 gpu: nvgpu: gp10b: Use mem_desc for buffers
Change-Id: Ia986125bf1a6e06121291f6dde24e580f0a1b61f
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/712836
2016-12-27 15:22:04 +05:30
Seshendra Gadagottu
750014be79 gpu: nvgpu: gp10b: support for replayable faults
Add support for enabling replayable faults during
channel instance block binding. Also fixed register
programing sequence for setting channel pbdma timeout.

Bug 1587825

Change-Id: I5a25819b960001d184507bc597aca051f2ac43ad
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: http://git-master/r/681703
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-12-27 15:22:04 +05:30
Terje Bergstrom
eff1aa4d92 gpu: nvgpu: gp10b: Set correct PBDMA signature
GPFIFO class was set to Maxwell class number. Also implement the
PBDMA signature HAL.

Change-Id: Ieaebcda8af96d5779289b311c0c433e8b4349234
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/672921
2016-12-27 15:22:03 +05:30