5 Commits

Author	SHA1	Message	Date
Abdul Salam	4c8a320f2c	gpu: nvgpu: Add support for guaranteed frequency ... 1. Check for volt margin and freq margin in VBIOS. 2. If it is valid (!255) send RPC to get margin, else ignore. 3. Get freq margin followed by volt margin. 4. Add this to requested voltage/freq based on output type. Bug 200492048 Change-Id: I513c6cdebcc7c2db348e3be37258e7657b48eb7e Signed-off-by: Abdul Salam <absalam@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2021974 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: Deepak Nibade <dnibade@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>	2019-02-26 07:55:18 -08:00
rmylavarapu	8daafcbae8	gpu: nvgpu: Restructuring clk.h into different units ... Changes: 1) Separated clk.h which is in /nvgpu/include/pmu into different units 2) Renamed global functions Intention: At present /nvgpu/include/pmu/clk.h consists of structures and functions of different clock units. It is difficult to work on individual clk units if this file is not separated into individual units. All stucts and functions in clk.h are seperated into different clk units. Individual private clk units were not touched. Post this patch, the sebsequent patches would make changes in the individual clk units. NVGPU-2707 Change-Id: I7bf9fab38a73bceb451291530a67c70ed343b0cb Signed-off-by: rmylavarapu <rmylavarapu@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2021704 Reviewed-by: Debarshi Dutta <ddutta@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>	2019-02-19 01:55:54 -08:00
Philip Elcan	2beed190a7	gpu: nvgpu: clk: update type for size param ... Update interfaces to use size_t to align with boardobj_construct_super() and avoid unnecessary casts. JIRA NVGPU-1008 Change-Id: Ib4539239363f106f1fba8d523072b28d0b8369ad Signed-off-by: Philip Elcan <pelcan@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2011434 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com> Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com> Reviewed-by: Scott Long <scottl@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Adeel Raza <araza@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>	2019-02-11 14:04:25 -08:00
Philip Elcan	75e4e7c9bc	gpu: nvgpu: clk: address MISRA 10.3 violations ... This fixes a number of miscellaneous MISRA 10.3 violations in common/pmu/clk/ for assignment of objects of different size or essential type. JIRA NVGPU-1008 Change-Id: If93aa9fc4f0f49ea678e39111f323ef4d53f5ec5 Signed-off-by: Philip Elcan <pelcan@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2008771 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>	2019-02-01 13:45:22 -08:00
Terje Bergstrom	dce78f7332	gpu: nvgpu: Move PMU code to common/pmu ... Move code interfacing with PMU tasks to common/pmu. JIRA NVGPU-961 Change-Id: Ie62611b0ffe1196d4bfdc740e03017e1894a834f Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1950991 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>	2019-01-10 20:09:55 -08:00