2 Commits

Author	SHA1	Message	Date
Philip Elcan	011b42e05f	gpu: nvgpu: pmgr: fix MISRA 10.3 violations ... Fix MISRA Rule 10.3 violations in common/pmu/pmgr for assigning objects of different size or essential type. JIRA NVGPU-1008 Change-Id: Icc6b6757d4231cbad842580b28f5fd86fdb1f79b Signed-off-by: Philip Elcan <pelcan@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2027655 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: Adeel Raza <araza@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Alex Waterman <alexw@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>	2019-03-07 11:44:05 -08:00
Terje Bergstrom	dce78f7332	gpu: nvgpu: Move PMU code to common/pmu ... Move code interfacing with PMU tasks to common/pmu. JIRA NVGPU-961 Change-Id: Ie62611b0ffe1196d4bfdc740e03017e1894a834f Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1950991 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>	2019-01-10 20:09:55 -08:00