Commit Graph

27 Commits

Author SHA1 Message Date
srajum
07583dffed gpu: nvgpu: fix MISRA 5.7 and 10.4 violations
- Rule 5.7 doesn't allow an identifier to be reused.
  This change renames variable "ops" to resolve this violation.

- Rule 10.4 says both operands of operators in which arithmetic
  operations will be do shall be of same type.

JIRA NVGPU-6056

Change-Id: Ic88f398c49d122cee206efcf88afd1edf951b042
Signed-off-by: srajum <srajum@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2561772
(cherry picked from commit c129465413db2c28bfcb0a039962cb65e2fca1ea)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2677518
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
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Reviewed-by: Dinesh T <dt@nvidia.com>
Reviewed-by: Ankur Kishore <ankkishore@nvidia.com>
GVS: Gerrit_Virtual_Submit
2022-03-08 05:31:29 -08:00
Richard Zhao
9ab1271269 gpu: nvgpu: common: fix compile error of new compile flags
It's preparing to add bellow CFLAGS:
    -Werror -Wall -Wextra \
    -Wmissing-braces -Wpointer-arith -Wundef \
    -Wconversion -Wsign-conversion \
    -Wformat-security \
    -Wmissing-declarations -Wredundant-decls -Wimplicit-fallthrough

Jira GVSCI-11640

Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Change-Id: Ia8f508c65071aa4775d71b8ee5dbf88a33b5cbd5
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2555056
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2022-01-13 12:36:14 -08:00
Sagar Kamble
d424598b7b gpu: nvgpu: stop nvs thread during unload
nvs worker thread is created on each resume and deinitialized on every
suspend. nvgpu can be resumed when process is getting killed. Thread
creation can fail when the process is getting killed. That will lead
to driver resume failure.

To avoid the issue above, don't stop the nvs worker thread in suspend
and let the first created thread handle the nvs work always.
Deinitialize the nvs worker thread during nvgpu unload.

Also, log the error returned by nvgpu_thread_create in the function
nvgpu_worker_start.

bug 3480192

Change-Id: I8d5d9e7716a950b162cc3c2d9fcfde07c4edfcf6
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2646218
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GVS: Gerrit_Virtual_Submit
2021-12-29 09:35:03 -08:00
Konsta Hölttä
23f6da4fe5 gpu: nvgpu: add should stop condition to workers
As the docs of nvgpu_thread say, each thread (which the worker loop is)
should wake up and check also nvgpu_thread_should_stop() to manage
graceful and quick exit as requested. The loop does have that check
already, but the workqueue condition does not, so the cond wait might
end up waiting until its timeout hits.

It's not robust to trust the worker users to have a swift timeout for
exiting the thread, so read the should-stop flag in the wakeup condition
too.

Simplify the clk arb worker ops now that calling
nvgpu_worker_should_stop from there is no longer necessary. (Other
worker users did not have those, so they were technically buggy.)

Change-Id: I5409b8037564d4b6445a15cdbd4f1f3d616c4083
Signed-off-by: Konsta Hölttä <kholtta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2635808
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2021-12-03 08:47:16 -08:00
Vedashree Vidwans
8a254279e5 gpu: nvgpu: ga10x: update channel status string
Chram channel status value is deprecated and should not be used. Change
channel status string construct logic to use other fields of
runlist_chram_channel_r() instead.
Add nvgpu_str_join() to concatenate multiple strings.

Bug 200779340

Change-Id: I4eda16f4d7ff99b11d9ee484e636dd68e8418f57
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2607400
(cherry picked from commit 18df0020857597f103f00fdf703e1fd2b5e9204b)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2607370
Reviewed-by: Alex Waterman <alexw@nvidia.com>
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2021-10-22 19:07:53 -07:00
ajesh
83d1ae9c0a gpu: nvgpu: add bvec tests for utils
Add boundary value tests for common utils unit.

JIRA NVGPU-6395

Change-Id: I4442f339c0238e7ee8a44277ca5f53db9c71f367
Signed-off-by: ajesh <akv@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2542636
(cherry picked from commit 125d73582d57b673b155ada6ce7430401d56dbc3)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2548579
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2021-06-29 06:58:24 -07:00
Vedashree Vidwans
aba26fa082 gpu: nvgpu: handle chip specific erratas
Currently, there are few chip specific erratas present in nvgpu code.
For better traceability of the erratas and corresponding fixes,
introduce flags to indicate existing erratas on a chip. These flags
decide if a corresponding solution is applied to the chip(s).

This patch introduces below functions to handle errata flags:
- nvgpu_init_errata_flags
- nvgpu_set_errata
- nvgpu_is_errata_present
- nvgpu_print_errata_flags
- nvgpu_free_errata_flags

nvgpu_print_errata_flags: print below details of erratas present in chip
1. errata flag name
2. chip where the errata was first discovered
3. short description of the errata

Flags corresponding to erratas present in a chip are set during chip hal
init sequence.

JIRA NVGPU-6510

Change-Id: Id5a8fb627222ac0a585aba071af052950f4de965
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2498095
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-by: Vaibhav Kachore <vkachore@nvidia.com>
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2021-04-28 19:14:44 -07:00
Vedashree Vidwans
8ebe7ca314 gpu: nvgpu: resolve GCC 9.3 toolchain errors
Using updated GCC 9.3 toolchain results into build failure with string
functions. The updated toolchain requires strncat API to be independent
of source string length.
Update strncat used in nvgpu_worker_init_name to use destination length
only.

Bug 3270814

Change-Id: Ie50a2bed2dc09a5e34d14012e1ba878ef4ff176f
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2500503
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Reviewed-by: Aidan Ha <aha@nvidia.com>
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2021-03-22 02:23:48 -07:00
ajesh
e10f201602 gpu: nvgpu: add checks as part of BVEC analysis
Add checks in common.utils unit as part of BVEC analysis.
The check in enabled.c makes sure that unauthorized memory access
is not performed and string.c is modified with a check to avoid
a possible invocation of BUG.

Jira NVGPU-6268

Change-Id: I672c9c54a2d7b61219dee1b249b9e1345381a965
Signed-off-by: ajesh <akv@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2494951
(cherry picked from commit 464e101b23b0143ff2e26e07659e34d1678dbf9d)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2497647
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2021-03-17 18:23:42 -07:00
Vedashree Vidwans
ae25924393 gpu: nvgpu: print enabled_flags after poweron
GPU enabled_flags indicate features supported by nvgpu.
Add nvgpu_print_enabled() to print GPU enabled_flags. Print flag value
after poweron complete to help during debug.
Add verbose function to print flag name and status if gpu_dbg_info is
set.

JIRA NVGPU-5838

Change-Id: I3b0ddb8c6872f4f3b6101050da087ff553c16f84
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2383531
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2020-12-15 14:13:28 -06:00
Philip Elcan
faec22ff7d gpu: nvgpu: utils: don't log address of unaligned word
Remove address from log print in nvgpu_mem_is_word_aligned(). This is to
meet security requirement not to log sensitive information.

JIRA NVGPu-4791

Change-Id: I5a216db9d52eb36acdb8ce3e172b0817d443ebf5
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2284869
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Reviewed-by: Thomas Fleury <tfleury@nvidia.com>
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2020-12-15 14:13:28 -06:00
Scott Long
5ee9a446b5 gpu: nvgpu: misra 12.1 fixes
MISRA Advisory Rule states that the precedence of operators within
expressions should be made explicit.

This change removes the Advisory Rule 12.1 violations from various
common units.

Jira NVGPU-3178

Change-Id: I4b77238afdb929c81320efa93ac105f9e69af9cd
Signed-off-by: Scott Long <scottl@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2277480
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2020-12-15 14:10:29 -06:00
Philip Elcan
0b0c4e6bd4 gpu: nvgpu: utils: fix typo in strnadd_u32
Fix typo where the wrong value would be created because 'c' comes before
'd'.

JIRA NVGPU-4826

Change-Id: I7ad0a931187267951a470f5c02bc4c134cc9a498
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2275455
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2020-12-15 14:10:29 -06:00
Adeel Raza
7c634f2489 gpu: nvgpu: error related MISRA fixes
Fix various MISRA violations related to error codes returned by
functions. These error codes were not being handled/checked.

JIRA NVGPU-3873

Change-Id: Id9a6caefe43248c4e22423cda3bac0ceeb9f47c9
Signed-off-by: Adeel Raza <araza@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2262187
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2020-12-15 14:10:29 -06:00
Sagar Kamble
698c79a89a gpu: nvgpu: handle input buffer alignment for misra 11.3 deviation in copy to falcon memory
Functions for copying to falcon memory typecast from pointer to char of
input buffer to pointer to u32 since falcon data registers are written
in 4-bytes. Firmware data is generally byte stream and hence we won't
be able to deal with input buffer as pointer to u32.

Hence, misra rule 11.3 deviation is required for these casts. Firmware
data is also not aligned at word boundary sometimes hence we need to
copy it to aligned buffer to conform to the deviation recommendation.

hal/falcon/falcon_gk20a_fusa.c:136
  Checker: MISRA C-2012 Rule 11.3 (Required)
  misra_c_2012_rule_11_3_violation: The object pointer expression "src"
  of type "u8 *" is cast to type "u32 *".

This patch implements copy to falcon memory from unaligned source byte
by byte and casts the input buffer to u32 pointer otherwise.

JIRA NVGPU-4128

Change-Id: Iff3cc1010b8e209ec453c10c6d46953cf5a8adbe
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2210321
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Reviewed-by: Mahantesh Kumbar <mkumbar@nvidia.com>
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2020-12-15 14:10:29 -06:00
Vedashree Vidwans
7c98fbba42 gpu: nvgpu: fix MISRA 17.1 in logging functions
MISRA Rule 17.1 forbids use of stdarg.h features which are defined for
variable arguments.
This patch modifies logging macros to use slogf function for QNX builds.
This avoids use of variable argument functions used for formatting log
message.

Jira NVGPU-4075

Change-Id: I5b6bb1107a7e431afaa960003858193a477b2ee6
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2192016
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2020-12-15 14:05:52 -06:00
Philip Elcan
b5f1135ba8 gpu: nvgpu: utils: improve CCM for rbtree
This improves the code complexity of the rbtree function
nvgpu_rbtree_unlink() by creating helper functions swap_in_new_child()
and adopt_children().

This reduces the TCC metric to 9.

JIRA NVGPU-4097

Change-Id: I2eb9ddf9a74478600874c71dab2b1267b5148b7b
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2205845
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2020-12-15 14:05:52 -06:00
Philip Elcan
5e0bf2bb7a gpu: nvgpu: utils: improve CCM for rbtree
Improve the code complexity for the rbtree function delete_fixup().
Create smaller functions, delete_fixup_right_child() and
delete_left_child() to handle those parts of the agorithm. Also, create
helper function has_no_red_children() to handle a common check in these
new functions.

This brings the TCC metric to 7.

JIRA NVGPU-4094

Change-Id: If34167be308093ae3b597e02bbd3da8b4e9d27aa
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2205844
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2020-12-15 14:05:52 -06:00
Adeel Raza
252ddc4f05 gpu: nvgpu: add coverity whitelisting support
Add macros for whitelisting coverity violations. These macros use pragma
directives. The pragma directives and whitelisting macros are only
enabled when a coverity scan is being run.

The whitelisting macros have been added to a new header called
static_analysis.h. The contents of safe_ops.h (CERT C safe ops) have
been moved into static_analysis.h because this will be the new header
for static analysis related macros/defines/etc.

JIRA NVGPU-3820

Change-Id: I9c63f20f670880b420415535738034619314b7c3
Signed-off-by: Adeel Raza <araza@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2180600
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2020-12-15 14:05:52 -06:00
Philip Elcan
09f7dd7fdd gpu: nvgpu: utils: fix CERT-C violations
Rule INT31-C requires that integer conversions do not result in lost or
misinterpreted data.
Rule INT32-C requires that operations on signed integers do not result
in overflow.
Rule EXP34-C requires that pointer dereferences never include NULL.
Fix violations of these types in nvgpu.common.utils.

JIRA NVGPU-3868

Change-Id: Ifcf4bc6536ca2df2adcb53b40b3e58316cc3e457
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2168576
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2019-08-09 10:38:18 -07:00
Philip Elcan
acc65f6e84 gpu: nvgpu: bug: move nvgpu_do_assert_print() into assert.c
There was a header file circular dependency that was preventing
including some files. For example, for utils.h to include safe_ops.h
would include bug.h which included log.h which included bitops.h which
included utils.h. To break this loop, the macro nvgpu_do_assert_print()
into a function in a new file assert.c. With this change, log.h is no
longer required in bug.h.

This change also required adding a few includes in C files that were
picking up definitions through the chain above.

JIRA NVGPU-3868

Change-Id: Icf95677bb36e4aa034cba25594cf71f2d028c289
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2168528
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2019-08-06 13:36:30 -07:00
Sagar Kamble
715f29ea9f Revert "gpu: nvgpu: handle falcon copy pointer alignment for misra 11.3 deviation"
This patch reverts the following commit 13a7ef2cc7

The bios devinit for tu104 encountered the unaligned buffer scenario.
However bios devinit functionality is now removed from nvgpu. Other
than that there are no firmwares where we expect the input/output
buffer addresses to be un-aligned, hence removing the logic added
to handle un-aligned addresses.

JIRA NVGPU-3271

Change-Id: Ifd24cc5b50b9d2548878436befb2220e7bf02ed4
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2161735
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2019-07-26 15:18:03 -07:00
Vedashree Vidwans
f51a775648 gpu: nvgpu: fix MISRA errors in nvgpu.common.utils
- MISRA Rule 17.7 requires function return values to be checked or used.
- MISRA Rule 21.6 forbids the use of snprintf formatting function.

This patch resolves the above mentioned rules in common/utils/worker.c.

Jira NVGPU-3804

Change-Id: I798c4170e4f60933cac3e3d430b1c6b7325613a8
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2151941
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2019-07-16 16:16:08 -07:00
ajesh
a6cbfca58c gpu: nvgpu: fix MISRA violations in bitops unit
Fix the following MISRA rule violations in bitops unit,
MISRA Rule 10.1
MISRA Rule 10.3
MISRA Rule 10.4
MISRA Rule 11.8
MISRA Rule 21.2
Introduce nvgpu specific functions for bitops and bitmap operations
with unsigned integer as parameter for offset.  OS specific type
conversions and handling of these inerfaces are taken care in the
respective OS files.

Jira NVGPU-3545

Change-Id: Ib1ef76563db6ba1d879a0b4d365b2958ea03f85c
Signed-off-by: ajesh <akv@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2129513
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2019-06-11 22:26:41 -07:00
Thomas Fleury
97762279b7 gpu: nvgpu: make nvgpu_init_mutex return void
Make the nvgpu_init_mutex function return void.
In linux case, this doesn't affect anything since mutex_init
returns void.
For posix, we assert() and die if pthread_mutex_init fails.

This alleviates the need to error inject for _every_
nvgpu_mutex_init function in the driver.

Jira NVGPU-3476

Change-Id: Ibc801116dc82cdfcedcba2c352785f2640b7d54f
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2130538
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2019-06-05 10:25:52 -07:00
Sagar Kamble
13a7ef2cc7 gpu: nvgpu: handle falcon copy pointer alignment for misra 11.3 deviation
Function for copying to/form IMEM/DMEM cast pointer to char to
pointer to u32 since falcon data registers are read/written in
4-bytes. Firmware data is generally byte stream and hence we
won't be able to deal in pointer to u32. Hence we need deviate
from misra rule 11.3.
Firmware data is also not aligned at word boundary sometimes
hence we need to copy it byte by byte to conform to the dev-
iation recommendation.

Error: MISRA C-2012 Rule 11.3: ./hal/falcon/falcon_gk20a.c:296:
misra_violation: The object pointer expression "src" of type
"u8 *" is cast to type "u32 *".

JIRA NVGPU-3271

Change-Id: Ic081f97226dbbcf08402970829624933402066eb
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2108547
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2019-06-03 21:25:32 -07:00
Alex Waterman
9e3f0b22e9 gpu: nvgpu: Move code to utils unit
The utils unit contains utilities that are useful to everyone. Things
like rbtree, enabled, string, etc go here. This helps prevent clutter
in the top level common directory. Also by organizing source code into
these top level units we reduce our SWUD burden: all utility code may
be described by one SWUD instead of many tiny SWUDs.

JIRA NVGPU-3544

Change-Id: Idc6169f375ba87b8a5d325712bf09aee8f27fb96
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2127479
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2019-05-31 15:44:54 -07:00