Commit Graph

1007 Commits

Author SHA1 Message Date
Konsta Hölttä
4b4ee3802a gpu: nvgpu: coverity-clean nvs sprintf
Cast the return code of sprintf away when creating a scheduling domain
device name. While at it, use snprintf just in case.

CID 497476
CID 497479

Bug 3512545

Change-Id: I4e26c29b889de4b709d582ec3fdde28c50fca5b9
Signed-off-by: Konsta Hölttä <kholtta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2681274
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
GVS: Gerrit_Virtual_Submit
2022-03-15 04:28:09 -07:00
Martin Radev
30c434efc1 gpu: nvgpu: check for extra mapping flags
User space may erroneously provide extra flags for buffer
mappings which always get silently ignored without any
error. It would be better to return error to catch cases
of ABI mismatches.

This patch checks if any extra flags were provided and
returns error if this is the case.

Jira NVGPU-6640
Bug 3489827

Change-Id: Ib226f049f81bef48bf00656259ed97ba0a3eb47c
Signed-off-by: Martin Radev <mradev@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2676684
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
GVS: Gerrit_Virtual_Submit
2022-03-09 21:07:59 -08:00
Martin Radev
8cba20ff42 gpu: nvgpu: sanitize TEGRA_RAW attribute
TEGRA_RAW mappings are only supposed to be used in special
circumstances by user space software, and the request cannot
be treated as a hint and be silently ignored if the feature
is not supported.

This patch updates the logic to return error if the feature is
not supported.

Jira NVGPU-6640
Bug 3489827

Change-Id: Ia2ce71df0202ab0c8676b815cf887cc7300aa07f
Signed-off-by: Martin Radev <mradev@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2676168
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
GVS: Gerrit_Virtual_Submit
2022-03-09 21:07:52 -08:00
Debarshi Dutta
cb70e86ac1 gpu: nvgpu: Allow SC7 suspend/resume
Allow SC7 suspend/resume for platforms even if runtime pm
is disabled.

Currently, nvgpu can disable runtime pm by setting railgate_init
field to false for platform_{gk20a/gv11b/ga10b) files. This is done by
taking extra reference count in the PM Framework.

However, device suspend would still fail. Fix this by checking
for NVGPU_CAN_RAILGATE and removing the additional reference count
taken as mentioned above. Take the extra refcount back at
the end of the resume path.

Bug 3458643

Signed-off-by: Debarshi Dutta <ddutta@nvidia.com>
Change-Id: I413e09e2f9f380d78c0ce30196591e9c5b7544f3
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2668567
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
GVS: Gerrit_Virtual_Submit
2022-03-09 21:04:59 -08:00
Antony Clince Alex
c0f4723339 gpu: nvgpu: perbuf: update PMA buffer mapping
The PMA unit can only access GPU VAs within a 4GB window, hence both
the user allocated PMA buffer and the kernel allocated bytes available
buffer should lie in the same 4GB window. This is accomplished by
carving out and reserving a 4GB VA space in perbuf.vm and using fixed
GPU VAs to ensure that both buffers are bound within the same 4GB window.

In addition, update ALLOC_PMA_STREAM to use pma_buffer_offset,
pma_buffer_map_size fields correctly.

Bug 3503708

Change-Id: Ic5297a22c2db42b18ff5e676d565d3be3c1cd780
Signed-off-by: Antony Clince Alex <aalex@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2671637
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Vaibhav Kachore <vkachore@nvidia.com>
GVS: Gerrit_Virtual_Submit
2022-03-07 15:17:35 -08:00
srajum
8e56c73eab gpu: nvgpu: fixing MISRA Rule 21.2 violation
- "va_start", "time" a reserved identifiers or macro names described
  in Section 7, "Library", of the C standard, shall not be declared.

JIRA NVGPU-6536

Change-Id: I868362819dd7178eb7b165f243fb6d36322d8372
Signed-off-by: srajum <srajum@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2582291
(cherry picked from commit 29c2c55b184cf16aee51614da895747750217885)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2674867
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Rajesh Devaraj <rdevaraj@nvidia.com>
Reviewed-by: Vaibhav Kachore <vkachore@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
GVS: Gerrit_Virtual_Submit
2022-03-01 06:08:00 -08:00
Debarshi Dutta
5c0dc7e39d gpu: nvgpu: add support for disabling l3 via DT
On volta the GPU determines whether to do L3 allocation for a mapping by
checking bit 36 of the physical address. So if a mapping should allocate
lines in the L3 this bit must be set.

However, when the physical addresses for 64GB of RAM uses the 36th bit
resulting in a conflict. Thus, add support for disabling l3 support
for SKUs having 64GB of physical memory.

Bug 3486025
Bug 3469094

Signed-off-by: Debarshi Dutta <ddutta@nvidia.com>
Change-Id: Ic540e754274cf1d9e6625493962699d21509e540
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2661548
(cherry picked from commit 46b43d2b24)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2661542
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Brad Griffis <bgriffis@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
Tested-by: Brad Griffis <bgriffis@nvidia.com>
GVS: Gerrit_Virtual_Submit
2022-03-01 06:05:58 -08:00
Konsta Hölttä
2a8914619d gpu: nvgpu: bind sched domains as fds
Replace id-based lookup with fd-based lookup when binding a TSG to a
domain. The device node based domain interface naturally provides access
control; this way userspace tools can limit which uid/gid can access
each domain.

Also, explicitly disallow binding channels to a TSG that has no runlist
domain yet. Normally a TSG is in the default domain if nothing else has
been specified, but the default domain can be deleted.

Jira NVGPU-6788

Change-Id: I2af96dfc002367d894eaf0c175006332f790c27f
Signed-off-by: Konsta Hölttä <kholtta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2651165
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
GVS: Gerrit_Virtual_Submit
2022-03-01 00:08:55 -08:00
Konsta Hölttä
3a64fdefc4 gpu: nvgpu: domains as files for access control
Create device nodes for user-created scheduling domains. This helps
leverage filesystem based access control: domains can be chosen to be
available for a limited set of users on a system.

The device nodes are dynamic: they can be removed while the driver is
running normally. This is a bit different from the nodes that exist
until the driver is unloaded, so the devno/domain mapping is stored in a
separate list. The usual container_of pattern would suffer from an
unavoidable race condition if a domain file was opened while the same
domain would get removed.

As usual, domain refcounting prevents a domain from being removed. Now
the open device files hold refs and thus any open domain files prevent a
domain from getting removed, in addition to the userspace-invisible ref
that is taken when a TSG is bound to a domain.

While at it, make the query ioctl guarded by the sched domain mutex, as
domains might technically get added or removed during the querying code.

Jira NVGPU-6788

Change-Id: Ief2a09a442c4e70f1f2be8a32359341071d74659
Signed-off-by: Konsta Hölttä <kholtta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2651164
Reviewed-by: Alex Waterman <alexw@nvidia.com>
GVS: Gerrit_Virtual_Submit
2022-03-01 00:08:49 -08:00
Konsta Hölttä
beed6d3c2b gpu: nvgpu: add nvgpu_get_v2_user_class()
Add a function to find the nvgpu_class of the v2 user device nodes. This
is the last entry in the class list, as the devices are created in that
order.

The v2 user class is not defined when MIG is enabled because there are
multiple logical devices; bigger changes would be needed for this.

Jira NVGPU-6788

Change-Id: I2177c1e5b4d0bbec77a4e258391859242b4f20d6
Signed-off-by: Konsta Hölttä <kholtta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2674427
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
GVS: Gerrit_Virtual_Submit
2022-03-01 00:08:43 -08:00
Konsta Hölttä
f11ca4c300 gpu: nvgpu: expose device creation
Allow gk20a_create_device() to happen outside the main ioctl logic and
rename it to have the modern nvgpu_ prefix. Add a separate function to
do cdev allocation and refactor the existing two callers slightly to
avoid repetition on the cdev struct initialization.

As a side effect, this modification fixes the error path that used to
not return an error if adding a device fails and also leaked the
allocated cdev memory.

Jira NVGPU-6788

Change-Id: Ia1f018b88d78fafdfcf4e95f6aa66e2368e58974
Signed-off-by: Konsta Hölttä <kholtta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2674426
Reviewed-by: Alex Waterman <alexw@nvidia.com>
GVS: Gerrit_Virtual_Submit
2022-03-01 00:08:37 -08:00
Konsta Hölttä
82df5b0219 gpu: nvgpu: track cdev minor numbers
The existing Linux character device nodes are statically configured
once. For other dynamically created devices, track the next minor number
in nvgpu_os_linux as a rudimentary allocator.

Only a small number of increments are expected at this time; in the
future, a bitmap might be more appropriate for tracking out-of-order
deallocations too.

Jira NVGPU-6788

Change-Id: I016ee8471313086620f9ab371583d6763848b0e2
Signed-off-by: Konsta Hölttä <kholtta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2651163
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
GVS: Gerrit_Virtual_Submit
2022-03-01 00:08:31 -08:00
Konsta Hölttä
086909ddd0 gpu: nvgpu: use correct err from device_create
When device_create fails, take PTR_ERR from the subdev that was
returned. Commit e8bac374c0 ("gpu: nvgpu: Use device instead of
platform_device") refactored this code but forgot to rename the error
retrieval.

Change-Id: Id01adac431da77a71c8e71e1b01a065826f5ebcf
Signed-off-by: Konsta Hölttä <kholtta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2673712
Reviewed-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
GVS: Gerrit_Virtual_Submit
2022-02-28 10:53:30 -08:00
Dinesh T
ef2a2be44f gpu: nvgpu: Add compression support with added contig memory pool
This is adding compression support for Ampere gpus by
the given contig memory pool.

Bug 3426194

Change-Id: I1c2400094296eb5448fe18f76d021a10c33ef861
Signed-off-by: Dinesh T <dt@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2673581
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
2022-02-27 18:10:41 -08:00
Divya
05a1f927f8 gpu: nvgpu: add golden image check for tpc_pg_mask
- Setting different tpc_pg_mask value leads to GPU crash.
- It is observed that with GPU railgating disabled, if
  tpc_pg_mask is set, "the gpu is powered on" error is
  reported and it won't allow to set the tpc_pg_mask, which
  is expected.
- With GPU railgating enabled, the different tpc_pg_mask
  value is set and the GPU is crashed.
- So, add check for golden image initialized before setting the
  TPC, GPC and FBP PG mask.
- This check won't allow to update TPC, GPC and FBP mask after
  golden image initialization and thus no GPU crash happens.

Bug 3544499

Change-Id: Ia003beaaec9dead22da74ea5862a81986780966b
Signed-off-by: Divya <dsinghatwari@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2672202
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Ninad Malwade <nmalwade@nvidia.com>
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
Tested-by: Ninad Malwade <nmalwade@nvidia.com>
GVS: Gerrit_Virtual_Submit
2022-02-22 05:57:37 -08:00
Shashank Singh
19a3b86f06 gpu: nvgpu: remove unused code from common.nvgpu on safety build
- remove unused code from common.nvgpu unit on safety build. Also,
remove the code which uses them in other places.
- document use of compiler intrinsics as mandated in code inspection
  checklist.

Jira NVGPU-6876

Change-Id: Ifd16dd197d297f56a517ca155da4ed145015204c
Signed-off-by: Shashank Singh <shashsingh@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2561584
(cherry picked from commit 900391071e9a7d0448cbc1bb6ed57677459712a4)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2561583
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
2022-02-17 04:58:32 -08:00
Rajesh Devaraj
0699220b85 gpu: nvgpu: compile-out unused apis from safety build
This patch does the following changes:
- Compiles-out unused error reporting APIs and the related
  data structures from safety build. For this purpose, it
  introduces the new flag: CONFIG_NVGPU_INTR_DEBUG
- Updates nvgpu_report_err_to_sdl() API with one more argument,
  hw_unit_id. This aids in finding whether an error to be reported
  is corrected or uncorrected from LUT.
- Triggers SW quiesce, if an uncorrected error is reported to
  Safety_Services, in safety build.
- Renames files in cic folder by replacing gv11b with ga10b,
  since error reporting for gv11b is not supported in dev-main.

JIRA NVGPU-8002

Change-Id: Ic01e73b0208252abba1f615a2c98d770cdf41ca4
Signed-off-by: Rajesh Devaraj <rdevaraj@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2668466
Reviewed-by: Tejal Kudav <tkudav@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Vaibhav Kachore <vkachore@nvidia.com>
GVS: Gerrit_Virtual_Submit
2022-02-14 22:00:33 -08:00
Konsta Hölttä
81c220b95b gpu: nvgpu: use %pS for function pointers
%pF is obsolete. Use %pS when debug printing function symbols. (One
print in kmem was already using this.)

Bug 3532466

Change-Id: Id3994abbcb0dc2495e69f3c872149c6ea5e3b5cb
Signed-off-by: Konsta Hölttä <kholtta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2667999
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
2022-02-11 18:27:39 -08:00
Debarshi Dutta
3d01b89e68 gpu: nvgpu: expose physical masks for GPCS/FBPs for MIG
Following changes are added
1) nvgpu_gr_config->gpc_tpc_mask_physical is now indexed by physical
gpc id instead of logical id.
2) Removed the conversion of logical fbp ids and replace them with
physical ids.
3) nvgpu_gpu_instance->fbp_en_mask now contains the mask of physical fbp ids.
4) gk20a_ctrl_ioctl_gpu_characteristics returns gpu.gpc_mask returns mask
of physical ids.

Bug 200712091

Signed-off-by: Debarshi Dutta <ddutta@nvidia.com>
Change-Id: I0e066df76e07203ff4a5be5bfff2cef8566b425d
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2648831
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: Antony Clince Alex <aalex@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
GVS: Gerrit_Virtual_Submit
2022-02-11 13:28:50 -08:00
srajum
852717ccc1 gpu: nvgpu: add GPLv2 license to OS-specific code for linux
Bug 3384871

Change-Id: Ibc7be6d0a8985a87f70b352f2d9e5c233015c2a2
Signed-off-by: srajum <srajum@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2632438
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Vaibhav Kachore <vkachore@nvidia.com>
Reviewed-by: Ankur Kishore <ankkishore@nvidia.com>
GVS: Gerrit_Virtual_Submit
2022-02-09 20:50:21 -08:00
Rajesh Devaraj
7dc013d242 gpu: nvgpu: merge error reporting apis
In DRIVE 6.0, NvGPU is allowed to report only 32-bit metadata to
Safety_Services. So, there is no need to have distinct APIs for
reporting errors from units like GR, MM, FIFO to SDL unit. All
these error reporting APIs will be replaced with a single API. To
meet this objective, this patch does the following changes:
- Replaces nvgpu_report_*_err with nvgpu_report_err_to_sdl.
- Removes the reporting of error messages.
- Replaces nvgpu_log() with nvgpu_err(), for error reporting.
- Removes error reporting to Safety_Services from nvgpu_report_*_err.

However, nvgpu_report_*_err APIs and their related files are not
removed. During the creation of nvgpu-mon, they will be moved under
nvgpu-rm, in debug builds.

Note:
- There will be a follow-up patch to fix error IDs.
- As discussed in https://nvbugs/3491596 (comment #12), the high
level expectation is to report only errors.

JIRA NVGPU-7450

Change-Id: I428f2a9043086462754ac36a15edf6094985316f
Signed-off-by: Rajesh Devaraj <rdevaraj@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2662590
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
2022-02-09 00:41:18 -08:00
Ramesh Mylavarapu
9302b2efee gpu: nvgpu: gsp units separation
Separated gsp unit into three unit:
- GSP unit which holds the core functionality of GSP RISCV core,
  bootstrap, interrupt, etc.
- GSP Scheduler to hold the cmd/msg management, IPC, etc.
- GSP Test to hold stress test ucode specific support.

NVGPU-7492

Signed-off-by: Ramesh Mylavarapu <rmylavarapu@nvidia.com>
Change-Id: I12340dc776d610502f28c8574843afc7481c0871
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2660619
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
2022-02-09 00:38:21 -08:00
Chris Johnson
14ed75e857 gpu: nvgpu: fix REMAP to support small/big pages
Initially, REMAP only worked with big pages but in some cases
only small pages are supported where REMAP functionality is
also needed.

This cleans up some page size assumptions. In particular, on a
remap request, the nvgpu_vm_area is found from the passed in VA,
but can only be done from virt_offset_in_pages if we're also
told the page size.

This now occurs from _PAGESIZE_ flags which are required by
both map and unmap operations.

Jira NVGPU-6804

Change-Id: I311980a1b5e0e5e1840bdc1123479350a5c9d469
Signed-off-by: Chris Johnson <cwj@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2566087
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
2022-02-09 00:37:33 -08:00
Konsta Hölttä
8736c0d467 gpu: nvgpu: add and use sw-only timers
The nvgpu timeout API has an internal override for presilicon mode by
default: in presi simulation environments the timeouts never trigger.
This behaviour is intended in the original usecase of the timer unit
with hardware polling loops. In pure software logic though, the timer
must trigger after the specified timeout even in presi mode so add a new
init function to produce a timer for software logic. Use this new kind
of timer in channel and scheduling worker threads.

The channel worker currently times out for just the purpose of the
channel watchdog timer which has its own internal timer. Although that's
just software, the general expectation is that the watchdog does not
trigger in presilicon tests that run slower than usual. The internal
watchdog timer thus keeps the non-sw mode.

Bug 3521828

Change-Id: I48ae8522c7ce2346a930e766528d8b64195f81d8
Signed-off-by: Konsta Hölttä <kholtta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2662541
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
GVS: Gerrit_Virtual_Submit
2022-02-04 22:02:33 -08:00
Antony Clince Alex
e96746cfcd gpu: nvgpu: profiler: update PMA stream free policy
Update PMA stream free policy to implicitly unbind any resources already
bound to the profiler object.

Bug 3480919

Change-Id: I71ed4b73be295a86046a1384800e7ed0f2430f64
Signed-off-by: Antony Clince Alex <aalex@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2662361
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
2022-02-02 21:47:33 -08:00
Dinesh T
e33bdceb8b gpu: nvgpu: Unify ivm mempool
CBC contig allocation requires mempool node in DT and the
node can be used for contig allocations. The code duplication
can be avoided by unifying the code from vgpu.

Change-Id: I6eaa1d0c9db47b158602bf0ba68ce4e09cf487a7
Signed-off-by: Dinesh T <dt@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2650459
Reviewed-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-by: Ankur Kishore <ankkishore@nvidia.com>
GVS: Gerrit_Virtual_Submit
2022-02-01 09:50:45 -08:00
Sagar Kamble
29a0a146ac gpu: nvgpu: fix coverity defects
Fix following coverity defects:
  ioctl_prof.c resource leak
  ioctl_dbg.c logically dead code
  global_ctx.c identical code for branches
  therm_dev.c resource leak
  pmu_pstate.c unused value
  nvgpu_mem.c dead default in switch
  tsg.c Dereference before null check
  nvlink_gv100.c logically dead code
  nvlink.c Out-of-bounds write
  fifo_vgpu.c Dereference null return value
  pmu_pg.c Dereference before null check
  fw_ver_ops.c Identical code for different branches
  boardobjgrp.c Dereference after null check
  boardobjgrp.c Dereference before null check
  boardobjgrp.c Dereference after null check
  engines.c Dereference before null check
  nvgpu_init.c Unused value

CID 10127875
CID 10127820
CID 10063535
CID 10059311
CID 10127863
CID 9875900
CID 9865875
CID 9858045
CID 9852644
CID 9852635
CID 9852232
CID 9847593
CID 9847051
CID 9846056
CID 9846055
CID 9846054
CID 9842821

Bug 3460991

Change-Id: I91c215a545d07eb0e5b236849d5a8440ed6fe18d
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2657444
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-by: Mahantesh Kumbar <mkumbar@nvidia.com>
GVS: Gerrit_Virtual_Submit
2022-01-28 04:50:12 -08:00
Tejal Kudav
4f41ce7696 gpu: nvgpu: Disable frequency scaling for AV+L
NVGPU does not support frequency scaling on hypervisor
based embedded environments.Disable frequency scaling on AV+L
using the nvgpu_is_hypervisor_mode().

JIRA NVGPU-7283

Change-Id: If8fbcc0c5e2f11b9e8895825bb3b3022e7bd3005
Signed-off-by: Tejal Kudav <tkudav@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2654969
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: Kasinadha Dendukuri <kdendukuri@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2022-01-17 05:37:23 -08:00
Sagar Kadamati
a3ed73a57c gpu: nvgpu: add tegra_raw support
* This change adds NVGPU_AS_MAP_BUFFER_FLAGS_TEGRA_RAW flag
   to control buffer format
 * Add NVGPU_SUPPORT_TEGRA_RAW enabled flag to indicate if feature
   is enabled for a given chip.
 * Update gv11b_gpu_phys_addr function to set TEGRA_RAW bit

Jira NVGPU-6640
Bug 3489827

Change-Id: I959c22bef906bb9c6dcdc8d5f5e9951ad9937a60
Signed-off-by: Sagar Kadamati <skadamati@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2545128
Reviewed-by: Martin Radev <mradev@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: Seema Khowala <seemaj@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
2022-01-13 12:35:36 -08:00
Debarshi Dutta
1c053a75af gpu: nvgpu: remove unnecessary warning.
Here, the freq_counter is set to track the count of number of
frequencies enumerated and capped by GP10B_MAX_SUPPORTED_FREQS.
There is an early terminating condition when new_rate equals max_rate.

The line following this is set to
WARN_ON(freq_counter == GP10B_MAX_SUPPORTED_FREQS);

This line is probably incorrect and contradicts the above loop as in
there is definite probability of freq_counter equaling
GP10B_MAX_SUPPORTED_FREQS. Probably the original intention might have
been to catch an off-by-1 error where freq_counter equals
GP10B_MAX_SUPPORTED_FREQS + 1.

Even then instead of printing a warning message, a better idea is to
handle the possible bug in the code itself.

Bug 3407276

Change-Id: I7f2a9d5c41be62227d08045e959e16c4228fbff4
Signed-off-by: Debarshi Dutta <ddutta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2623380
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
2022-01-12 07:40:37 -08:00
Deepak Nibade
7f839d6098 gpu: nvgpu: take power refcount for pma stream update get/put IOCTL
Add gk20a_busy()/idle() protection for pma stream update get/put IOCTL
NVGPU_PROFILER_IOCTL_PMA_STREAM_UPDATE_GET_PUT

Bug 2510974

Change-Id: Iade198f68e72f6fbc49be8ee55e4b44a4c332451
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2650588
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
2022-01-07 06:30:24 -08:00
Sagar Kamble
535a27411a gpu: nvgpu: fix allocator debugfs deinit
Allocator (bitmap, buddy, page) debugfs files are not cleaned up when
the allocators are destroyed. This leads to warning logs from nvgpu
like below:

[21073.493000] debugfs: File 'gk20a_as_17' in directory 'allocators' already present!
[21073.493026] debugfs: File 'gk20a_as_17-sys' in directory 'allocators' already present!

Remove the per-allocator debugfs node when destroying an allocator in
runtime.

While at this, add missing nvgpu_allocator locking to the function
nvgpu_bitmap_alloc_destroy. And create nop functions for the
functions nvgpu_init_alloc_debug and nvgpu_fini_alloc_debug
when CONFIG_DEBUG_FS is not defined to avoid adding the
CONFIG checks at multiple places.

Move gk20a_debug_deinit to the end of gk20a_free_cb called in nvgpu_put
as that tears down all debugfs entries. Allocator destroy happens as
part of nvgpu_put call and it can lead to invalid debugfs dentry
access if gk20a_debug_deinit is called before it.

Bug 3481097

Change-Id: I8a66bcf6ade7e5707f9207c78a54d12d7bd94c02
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2648012
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
2022-01-07 06:28:53 -08:00
Sagar Kamble
4e227b3e80 gpu: nvgpu: use nvmap exported APIs for dma_alloc|free_attrs on kstable
To support nvmap as OOT module in kstable it implemented the APIs
nvmap_dma_alloc_attrs and nvmap_dma_free_attrs to replace usage
of kernel dma_alloc_attrs and dma_free_attrs. nvmap APIs have
special handling for VPR carveout.

Use those exported APIs in nvgpu when CONFIG_NVGPU_NVMAP_NEXT is
defined. This config will be defined only for kstable builds.

JIRA LS-458
Bug 200754700

Change-Id: I717aa579d29ee10c006b044f6b0fafbedc57dba8
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2647951
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
2022-01-05 20:57:40 -08:00
Sagar Kamble
a2f4fdf190 gpu: nvgpu: enable CONFIG_NVGPU_VPR for all kernels
VPR functionality is split up as static VPR and VPR resize. Static VPR
is supported on all kernels. VPR resize is enabled only on 4.9 kernel.

Enable CONFIG_NVGPU_VPR unconditionally in Linux Makefile. Compile
VPR resize related functionality in nvgpu under the check for
Linux kernel version using new define NVGPU_VPR_RESIZE_SUPPORTED.

JIRA LS-458
Bug 200754700

Change-Id: Ib92f7f1b95afc6c69fbdf33354459c147337350c
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2647619
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
2022-01-05 20:57:32 -08:00
Dinesh T
a47ce8eafe gpu: nvgpu: add ipa-pa cache for qnx
This is adding ipa-pa cache for HV-qnx by making the code
as OS independant.

NVGPU-7329

Change-Id: If003ddf323124ba0899d7ead5db5c5478ddfc6e0
Signed-off-by: Dinesh T <dt@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2645771
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
2021-12-31 05:04:50 -08:00
Martin Radev
b67a3cd053 gpu: nvgpu: ga10b: Correct VAB implementation
This patch performs the following improvements for VAB:
1) It avoids an infinite loop when collecting VAB information.
   Previously, nvgpu incorrectly assumed that the valid bit would
   be eventually set for the checker when polling. It may not be set
   if a VAB-related fault has occurred.
2) It handles the VAB_ERROR mmu fault which may be caused for various
   reasons: invalid vab buffer address, tracking in protected mode,
   etc. The recovery sequence is to set the vab buffer size to 0 and
   then to the original size. This clears the VAB_ERROR bit. After
   reseting, the old register values are again set in the recovery
   code sequence.
3) Use correct number of VAB buffers. There's only one VAB buffer on
   ga10b, not two.
4) Simplify logic.

Bug 3374805
Bug 3465734
Bug 3473147

Change-Id: I716f460ef37cb848ddc56a64c6f83024c4bb9811
Signed-off-by: Martin Radev <mradev@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2621290
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
2021-12-22 08:22:13 -08:00
Seshendra Gadagottu
820d2b4a2d gpu: nvgpu: keep gpu busy during vab reserve/flush ioctls
VAB IOCTL for reserve and flush can take more than railgate_delay(500msec).
To avoid gpu entering into railgate, set gpu busy hint during entry and set to
idle at the end of ioctl.

Bug 3468562

Change-Id: I9219e65004ad42028062ce09a315d9fde029a86c
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2643418
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
2021-12-21 12:20:48 -08:00
Ninad Malwade
54adf26042 nvgpu: set tpc_pg_mask only if it's changed
Set tpc_pg_mask only if it's different from the one which is set
earlier.

Bug 3463659

Change-Id: I8388e10ac0adcd56cf310c491c870614419bd18d
Signed-off-by: Ninad Malwade <nmalwade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2641763
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Rajkumar Kasirajan <rkasirajan@nvidia.com>
Reviewed-by: Debarshi Dutta <ddutta@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
2021-12-21 12:18:14 -08:00
Seema Khowala
38010b612a Revert "gpu: nvgpu: ga10b: disable ELPG"
This reverts commit 09c0813c94.

Reason for revert: Enable ELPG

Bug 3430273
Bug 3439350

Change-Id: I6f1143c514e521ab0681e6659c55604161a19539
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2638370
Reviewed-by: Divya Singhatwaria <dsinghatwari@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: Divya Singhatwaria <dsinghatwari@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
2021-12-18 02:50:42 -08:00
Konsta Hölttä
55afe1ff4c gpu: nvgpu: improve nvs uapi
- Make the domain scheduler timeslice type nanoseconds to future proof
  the interface
- Return -ENOSYS from ioctls if the nvs code is not initialized
- Return the number of domains also when user supplied array is present
- Use domain id instead of name for TSG binding
- Improve documentation in the uapi headers
- Verify that reserved fields are zeroed
- Extend some internal logging
- Release the sched mutex on alloc error
- Add file mode checks in the nvs ioctls. The create and remove ioctls
  require writable file permissions, while the query does not; this
  allows filesystem based access control on domain management on the
  single dev node.

Jira NVGPU-6788

Change-Id: I668eb5972a0ed1073e84a4ae30e3069bf0b59e16
Signed-off-by: Konsta Hölttä <kholtta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2639017
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
2021-12-15 06:05:25 -08:00
Konsta Hölttä
d086c678fd gpu: nvgpu: add domain scheduler worker
Move away from the prototype call in channel wdt worker and create a
separate worker thread for the domain scheduler. The details of runlist
domains are still encapsulated in the runlist code; the domain scheduler
controls when to switch domains. Switching happens based on domain
timeslices or when the current domain is deleted.

The worker thread is paused on railgate and spun back on poweron. The
scheduler data was also left dangling, so fix that by deinitializing all
nvs-related when gk20a_remove_support() is called. The runlist domains
already get freed as part of fifo removal.

Jira NVGPU-6427

Change-Id: I64f42498f8789448d9becdd209b7878ef0fdb124
Signed-off-by: Konsta Hölttä <kholtta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2632579
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
2021-12-14 06:26:16 -08:00
Konsta Hölttä
ffb7e1f5ec gpu: nvgpu: fix power races in gsp test
The GSP stress test debug node only checks for gpu poweron and continues
to trigger the stress test if power is on. This results in a small
window where the GPU might get railgated, so call gk20a_busy() to hold a
power ref while loading or starting the stress test (which touches HW).

Change-Id: I2ced45472cd0602da36f1801e56b486097ece83d
Signed-off-by: Konsta Hölttä <kholtta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2635604
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Dinesh T <dt@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
2021-12-10 13:25:05 -08:00
Konsta Hölttä
d474bd4206 gpu: nvgpu: advertise NVS capability in gpu chars
Add nvs_ioctl_nr_last in nvgpu_gpu_characteristics. Add a feature flag
SUPPORTS_NVS and enable it in Linux builds.

Jira NVGPU-6788

Change-Id: I19df78982cca989da7ee053511af59bbb5df1180
Signed-off-by: Konsta Hölttä <kholtta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2636409
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2021-12-07 07:11:14 -08:00
Konsta Hölttä
1d14a4412f gpu: nvgpu: scheduler management uapi
Add ioctls for creating, removing and querying scheduling domains and
interface with the "nvsched" entity that will be the core scheduler.
Include the scheduler in the Linux build.

The core scheduler code will ultimately hold data on and control what
gets scheduled, but this intermediate layer in nvgpu-rm needs a bit of
bookeeping to manage the userspace interface.

To keep changes isolated, this does not touch the internal runlist
domains yet. The core scheduler logic will eventually control the
runlist domains.

Jira NVGPU-6788

Change-Id: I7b4064edb6205acbac2d8c593dad019d517243ce
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Signed-off-by: Konsta Hölttä <kholtta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2463625
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
2021-12-07 07:07:01 -08:00
Tejal Kudav
3b1bbc7259 gpu: nvgpu: Remove GP10b support
Starting 6.0.2.0, deprecate support for GP10b. Delete GP10b specific
things such as platform data, ucodes, regops allowlist, cg/pg register
list. Per unit specific gp10b code cleanup will be done later.

Bug 3431142

Change-Id: I4d5fd9ad8c6ee53845df3b6b2298af64d76e86c3
Signed-off-by: Tejal Kudav <tkudav@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2630946
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
2021-12-03 08:43:52 -08:00
Ninad Malwade
69ffeeaa26 gpu: nvgpu: fix the tpc_pg_mask read and store return values
tpc_pg_mask_read: function returns the value stored in the
tpc_pg_mask node. Since, it does not have the terminator it
returns garbage value after the mask value and gets troublesome
to parse in the userspace. Fix is to add '\n' at the end of the
mask value to be consistent with the earlier releases.

tpc_pg_mask_store: In this function there is a call to check if
gpu is powered on or not. In case when gpu is powered on, the return
value is just assigned to the 'err' variable which is never
returned to notify the application to follow the next steps. Thus,
need to return this value and inform the same to the userspace.

Bug 3445617

Change-Id: Ibb6fed88c83c751a5fb73181089274aa27c3f18b
Signed-off-by: Ninad Malwade <nmalwade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2630925
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2021-11-30 11:30:16 -08:00
Sagar Kamble
b6d349dcf6 gpu: nvgpu: init all buffer compbits state members
User fence syncpt_id in the buffer compbits state was set to 0
on allocation through PREPARE_COMPRESSIBLE_READ ioctl or
MARK_COMPRESSIBLE_WRITE ioctl.

In case NVGPU_GPU_COMPBITS_GPU is requested through the ioctl
PREPARE_COMPRESSIBLE_READ, CDE conversion command is not
submitted and the output fence is cloned from the initial
state fence (with syncpt_id=0).

NvRmSyncWait on this fence from userspace lead to below error:
  13e40000.host1x: nvhost_syncpt_wait_timeout: invalid syncpoint id 0

Initialize the buffer compbits state user fence syncpt_id to
NVGPU_INVALID_SYNCPT_ID with nvgpu_user_sync_init() so that
the userspace skips the NvRmSyncWait on that fence.

While at it, initialize other uninitialized members, valid_compbits
and zbc_color.

Bug 3360675

Change-Id: Ie2a584546e1ed37841cbdc3472b598794f911e6f
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2631235
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
2021-11-27 10:08:14 -08:00
Sagar Kamble
41df3e17a7 gpu: nvgpu: fix nvgpu remove sequence
While removing the nvgpu module, all gpu unmaps should happen before
removing the PMU support as ELPG_MS accesses pmu pg structure and
ELPG_MS is disabled/enabled while accessing TLB or cache flush.

nvgpu_fb_vab_teardown_hal and mmu_fault.info_mem_destroy do gpu
unmaps. They were executed post removal of PMU support. Fix the
sequence.

Bug 3448630

Change-Id: I44925c313c625a2d0f297d1367d69069b3deacef
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2632490
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
2021-11-26 08:47:52 -08:00
Rajkumar Kasirajan
71cd434f4f gpu: nvgpu: add thermal cooling support
Add devfeq thermal cooling device for GPU software thermal throttling.

Bug 3287074

Change-Id: Ib0b53a58177964dfda3c8993da9c4835e2cb8a6e
Signed-off-by: Rajkumar Kasirajan <rkasirajan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2625659
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-by: Srikar Srimath Tirumala <srikars@nvidia.com>
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
2021-11-26 08:46:00 -08:00
Seshendra Gadagottu
616a885079 gpu: nvgpu: ga10b: enable frequency scaling
Enable GPU frequency scaling for t234 silicon.

Bug 3315239

Change-Id: I0b581283d4c9558fb9f7c3b553ea8bee71ba22af
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2617544
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
2021-11-25 08:16:42 -08:00