Commit Graph

1065 Commits

Author SHA1 Message Date
shaochunk
c655a5e058 gpu: nvgpu: specify devfreq timer through dt
Originally,
nvgpu uses deferrable timer for devfreq polling by default,
this leads to issues below because of unstable polling interval.
 - out of time frequency scaling
 - unstable GPU frequency scaling

This change lets users be able to specify devfreq timer through dt.
If the dt node 'devfreq-timer' equals to 'delayed', then gpu will uses
delayed timer for devfreq polling.

Bug 3823798

Change-Id: Idc0849b4a6b8af52fda8e88f5c831f183b7a27de
Signed-off-by: shaochunk <shaochunk@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2897026
Reviewed-by: Divya Singhatwaria <dsinghatwari@nvidia.com>
Reviewed-by: Rajkumar Kasirajan <rkasirajan@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
2023-05-19 03:36:48 -07:00
Sagar Kamble
c066401be7 gpu: nvgpu: disable nvgpu rpm if genpd support is not available
GPU is set to always ON state on safety L4T for SMCU to not fault.
However, nvgpu railgating was always enabled. This will lead to
improper GPU railgate/unrailgate sequence as bpmp will not
powergate/ungate the gpu on suspend and resume requests.

Keeping rpm enabled can lead to ACR failure on resume as it expects
the GPU to be reset on every resume.

Disable nvgpu runtime PM when the power domain node for the gpu is
not defined.

Bug 4111746

Change-Id: I9215ea87dbfbf53360003cac5f8a51d39982ace9
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2904335
Reviewed-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
2023-05-16 02:06:47 -07:00
Divya
c62bdb94ba gpu: nvgpu: add sysfs node for golden img status
- Add a sysfs node "golden_img_status" to show
  if golden_image size and ptr are already initialized
  or not.
- This node helps to know golden image status before
  attempting to modify gpc/tpc/fbp masks.

Bug 3960290

Change-Id: I3c3de69b369bcaf2f0127e897d06e21cb8e2d68e
Signed-off-by: Divya <dsinghatwari@nvidia.com>
(cherry picked from commit c728f09c18)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2864095
Reviewed-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-by: Jonathan Hunter <jonathanh@nvidia.com>
Reviewed-by: Mahantesh Kumbar <mkumbar@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
2023-05-05 06:06:47 -07:00
atanand
a1b0d921b4 gpu: nvgpu: Get GA10B EMC floorsweeping status
The memory bandwidth reported by the nvgpu driver is a resultant of FBP and EMC floorsweeping status. The FBP floorsweep status was already getting reported in the GPU characterstics so the status of EMC was fetched and reported in this change.

Jira NVGPU-9609
Bug 3661074

Change-Id: Ia2fe6cb029d086765da15d9e964ea77256e06604
Signed-off-by: atanand <atanand@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2859237
(cherry picked from commit 9dd2a8fc73)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2892943
Reviewed-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-by: Kirill Artamonov <kartamonov@nvidia.com>
Reviewed-by: Ankur Kishore <ankkishore@nvidia.com>
Tested-by: Kirill Artamonov <kartamonov@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
2023-04-27 11:36:51 -07:00
Sagar Kamble
dd8f7114ba gpu: nvgpu: update dmabuf locking
All drivers that use dma-bufs have been moved to the updated locking
specification wherein dma-buf reservation is to be locked while
accessing the dmabuf internal data. Lock is removed. So lock
the resv object onwards while updating dmabuf private data
used for compression and buffer metadata.

With this, we can enable compression for all kernel versions that
was disabled earlier for v6.2+ kernels.

Bug 3974855
Bug 3995618

Change-Id: Iece3ab57912d0420d4bc5c07d2c0d2e03ff19292
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2877633
(cherry picked from commit 410d3603ff)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2880975
Reviewed-by: Jonathan Hunter <jonathanh@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
Tested-by: Jonathan Hunter <jonathanh@nvidia.com>
2023-04-03 01:06:38 -07:00
Kishan
ddbd2da4a9 gpu: nvgpu: Fix gv11b LUT for safe jetpack product
Current ga10b LUT used in gv11b is tailormade for auto safety
wherein non-ecc errors are treated as fatal and accordingly
quiesce is triggered. Recovery is also not supported.
Jetson industrial expects recovery in scenarios where it can
be supported.
Replaced ga10b automotive safety based LUT with gv11b
safe jetpack specific LUT. With this LUT, error criticality
is consistent across rel-32 and rel-35 .
The supported behaviour is:
1.Corrected ECC error, we report it as non-fatal
error and only convey the error to L1SS.
2.Uncorrected ECC error, we report it as fatal error
and hence trigger quiesce.
3.Non-ECC error, we report it as non-fatal and let
nvgpu perform recovery if it exists.

Bug 3920935

Change-Id: Iaa64aa91d6dd84b21c4d0c4684ead498e398698a
Signed-off-by: Kishan <kpalankar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2866975
Reviewed-by: Tejal Kudav <tkudav@nvidia.com>
Reviewed-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
2023-03-15 10:36:32 -07:00
Alex Waterman
ac6e0c3766 gpu: nvgpu: Disable compression for k6.1+
dmabuf internals that nvgpu relies upon for storing meta-data for
compressible buffers changed in k6.1. For now, disable compression
on all k6.1+ kernels.

Additionally, fix numerous compilation issues due to the bit rotted
compression config. All normal Tegra products support compression
and thus have this config enabled. Over the last several years
compression dependent code crept in that wasn't protected under the
compression config.

Bug 3844023

Change-Id: Ie5b9b5a2bcf1a763806c087af99203d62d0cb6e0
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2820846
(cherry picked from commit 03533066aa)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2860925
Tested-by: Jonathan Hunter <jonathanh@nvidia.com>
Reviewed-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-by: Jonathan Hunter <jonathanh@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
2023-03-10 03:51:44 -08:00
Jon Hunter
e914561b6e gpu: nvgpu: Fix crash on reboot
A kernel panic has been observed sometimes on reboot. The crash occurs
in the nvgpu_kernel_shutdown_notification() function when calling
nvgpu_cond_signal(). Fix this by checking that the 'gr' pointer is valid
before calling nvgpu_cond_signal().

Bug 3943885

Change-Id: I81e5e1b1128f22832daf01b880fac2a5e38f2a7a
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2846761
Reviewed-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
2023-01-20 08:51:28 -08:00
Jon Hunter
82b95758d1 nvgpu: Fix devnode function pointers for Linux v6.2
Upstream Linux kernel commit ff62b8e6588f ("driver core: make struct
class.devnode() take a const *") updated the 'devnode' function pointer
under the class structure to take a const device struct. This breaks
building the NVGPU driver with Linux v6.2. Make the necessary changes to
the NVGPU driver to fix the build breakage.

Bug 3936429
Bug 3844023

Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Change-Id: Ia39d7fded8df0e4eb30ebd58b2261e48e1963549
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2841032
(cherry picked from commit 315813beac)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2842397
Reviewed-by: Alex Waterman <alexw@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
2023-01-15 11:21:33 -08:00
Sagar Kamble
eacaf8cec2 gpu: nvgpu: register pm_qos min & max frequency notifiers
nvpmodel updates the devfreq frequency limits as per power requirements
for specific chip. Clock arbiter ignored these limits and set clock
to maximum supported frequency which may lead to leaking power and
over heating.

Add support to get the devfreq limits by registering PM_QOS notifiers.
Note that with this patch we enable CONFIG_GK20A_PM_QOS when PM_DEVFREQ
is enabled. So it will be enabled for all supported kernels (4.9, 4.14
kernels continue to support this. For 5.10+ kernels notifiers added in
this patch will be used. Thermal framework related notifiers for kernels
after 4.14 will not be registered as those use downstream interfaces
that are not available.)

We maintain devfreq min/max limits in the scale profile and update those
in the notifier calls. We use these limits to clamp the frequency in the
clock arbiter.

Bug 3852824

Change-Id: I734a9fb080fee1a91e9b5da071b662dbd9a18682
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2822686
Tested-by: Rajkumar Kasirajan <rkasirajan@nvidia.com>
Reviewed-by: Rajesh Devaraj <rdevaraj@nvidia.com>
Reviewed-by: Dinesh T <dt@nvidia.com>
Reviewed-by: Rajkumar Kasirajan <rkasirajan@nvidia.com>
Reviewed-by: Ankur Kishore <ankkishore@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
2022-12-09 01:21:15 -08:00
Mikko Perttunen
a432d2adf3 gpu: nvgpu: linux/host1x: Execute fence callback in non-atomic context
Due to changes in the host1x driver, dma_fence callbacks will be
executed in interrupt context instead of workqueue context as
previously. To allow for that, this patch effectively moves the
workqueue step into nvgpu so that the in-nvgpu fence callback gets
executed in workqueue context.

Bug 3730564

Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Change-Id: I7bfa294aa3b4bea9888921b79175a8fc218d8e3f
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2785968
(cherry picked from commit 5c8e511e48)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2823241
Tested-by: Jonathan Hunter <jonathanh@nvidia.com>
Reviewed-by: Jonathan Hunter <jonathanh@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
2022-12-08 12:52:09 -08:00
Debarshi Dutta
6965343d13 gpu: nvgpu: don't skip setting same clk in arbiter
In the current setting, clock arbiter skips setting
the clock if its already set previously. The value
set by the arbiter is stored in
"struct nvgpu_clk_arb->actual" whenever the clock is
updated via the arbiter. However, DVFS might also
update the clock and the updates are not synchronized
with the arbiter. Hence, ensure that any clock
requests are always updated i.e. the requested rate is
set even if the previous rate remains the same.

In the devfreq scale() part, scale emc when clk_arb
is active and skip setting of clocks.

Note that this is cherry-pick from dev-main. Previously
merged cherry-pick is not complete.

Bug 3666615
Bug 3852824

Change-Id: I480a816434dcd59d18a287954a536fd7061c707c
Signed-off-by: Debarshi Dutta <ddutta@nvidia.com>
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2822685
Reviewed-by: Ankur Kishore <ankkishore@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
2022-12-07 03:37:18 -08:00
Divya
27f3fc61a3 gpu: nvgpu: wake up gr wait wq in rmmod path
- The pmu_pg_task thread remains alive in the background
  during railgate and rail-ungate.
- During rail-ungate, the PG task thread starts again and
  executes PG-related tasks.
- It comes in pmu_pg_init_powergating() and waits for GR
  initialization. Here it waits for gr to be initialized.
- In parallel, the main GPU thread works on rmmod (from
  gpu_module_reload test).
- By this time, the main gpu thread has started rmmod and
  gr->initialized can be set to false, thus causing an uninterruptible
  wait for pmu_pg_task thread.
- To solve this, wake gr wait wq in rmmod path when
  NVGPU_DRIVER_IS_DYING and NVGPU_KERNEL_IS_DYING flgas are set.

Bug 3806514
Bug 3756912

Change-Id: Id78d92f30b75aba1aee22398cc86a3acebd50ef6
Signed-off-by: Divya <dsinghatwari@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2798003
(cherry picked from commit d9345065bcb6d9ff497c127fa4cd52077f4ecfa4)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2819084
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
2022-11-30 21:07:01 -08:00
Divya
26423cad95 gpu: nvgpu: add nvgpu_start_gpu_idle in nvgpu_remove path
- With ELPG + RG enabled, gpu_module_reload test fails.
- This happens because the test tries to unload nvgpu.ko
  module and then reload it. This all happens with RG enabled.
- During rmmod of nvgpu.ko module the code path taken is:
  nvgpu_remove() ->  nvgpu_quiesce() -> gk20a_pm_prepare_poweroff
  -> nvgpu_prepare_poweroff -> pmu_destroy
- In this code path, NVGPU_DRIVER_IS_DYING flag is not set.
- Thus, in pmu_pg_task thread (which keeps on running in parallel),
  commands are sent to the PMU and the driver keeps waiting for the
  ACK in nvgpu_pmu_wait_fw_ack_status().
- Add nvgpu_start_gpu_idle() in nvgpu_remove() path, before calling
  nvgpu_quiesce().
- This will set NVGPU_DRIVER_IS_DYING flag to true.
- nvgpu_can_busy() will return 0 when the driver is shutting down or
  getting removed.

Bug 3676200
Bug 3756912

Change-Id: Ic24f58c210e4b477e5d560b053b70c16308e16f1
Signed-off-by: Divya <dsinghatwari@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2762310
(cherry picked from commit 8f1792565e71b822a6e9cc50af4b43c1b48518e0)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2819082
Reviewed-by: Mahantesh Kumbar <mkumbar@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
2022-11-30 21:06:50 -08:00
Divya
1274f25dda gpu: nvgpu: Update the error code for tpc_pg_mask
- nvpmodel service used to expect a return value of -ENODEV from the
  underlying tpc_pg_mask_store() when the golden image size was
  initialized.
- With the current implementation, the return value is -EINVAL due to
  which write for new tpc_pg_mask was not successful.
- Update the return value to -EBUSY for the case where golden image
  is already initialized.

Bug 3765637

Change-Id: I5a1a38cce035ea245db5d72c9f5db210d3bb95f1
Signed-off-by: Divya <dsinghatwari@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2778855
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Mahantesh Kumbar <mkumbar@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
2022-09-21 09:21:56 -07:00
Divya
4ed38d5b2a gpu: nvgpu: update tpc-pg support
- Add tpc count variable in the platform struct
  to store the number of tpcs present in the  chip.
  This count is needed before GPU boots to provide
  support for static TPC-PG feature.
- Remove valid_tpc_pg_mask and valid_gpc_fbp_pg_mask
  variable from gk20a struct as it is already taken care
  in platform struct.

Bug 3765637
JIRA NVGPU-8210

Change-Id: Ic04af4b7c24f5e790c52708c117e45a3bb0d1810
Signed-off-by: Divya <dsinghatwari@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2725960
(cherry picked from commit 001e9a2695)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2775710
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Mahantesh Kumbar <mkumbar@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
2022-09-21 09:21:51 -07:00
Jon Hunter
cd85e527ec gpu: nvgpu: Add host1x support for Tegra234
Add support for the upstream host1x driver in NVGPU for Tegra234.

Bug 3724727
Bug 3752030

Change-Id: I529b731ea3feb3c8c435e7433772af82004ea208
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2759207
(cherry picked from commit 34f478fca6)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2768288
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
2022-08-30 05:37:18 -07:00
Jon Hunter
7d9e5f9780 gpu: nvgpu: Fix crash if tegra_bpmp_get() fails
The function tegra_bpmp_get() returns an error pointer on failure and
so if the call to tegra_bpmp_get() fails, because the device-tree
property is missing, then this is not detected and leads to a crash when
trying to dereference the pointer to the bpmp handle. Fix this by
correctly checking the return value from tegra_bpmp_get().

Bug 3752030

Change-Id: I944063ab7e116fc81769c9dbbfefe6b6dc4bf0f4
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2759251
(cherry picked from commit 59f7a9e318)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2768287
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
2022-08-30 05:37:13 -07:00
Martin Radev
eb5d644536 gpu: nvgpu: Consume L3 map flag even if L3 not supported
This patch fixes a bug where GPU mappings with the L3 hint
would fail. The failure happens because the L3 map flag does
not get consumed if L3 allocations are disabled. The fix
is to consume the flag.

Bug 3717951
Bug 3486025

Change-Id: Ib10ee58cc060318c810f86013de7311f73c25729
Signed-off-by: Martin Radev <mradev@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2750419
(cherry picked from commit cb768ff133)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2750903
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: Winnie Hsu <whsu@nvidia.com>
GVS: Gerrit_Virtual_Submit
2022-07-28 10:06:31 -07:00
Debarshi Dutta
e4b3499850 gpu: nvgpu: add a soft dependency on podgov module
The present implementation of podgov driver doesn't
export any symbols and as a result, the dependency
between NVGPU driver and podgov is not established
by depmod. Fix that by adding a soft dependency.

MODULE_SOFTDEP("pre: governor_pod_scaling");

This allows loading the podgov governor before
nvgpu driver.

Bug 3674235

Signed-off-by: Debarshi Dutta <ddutta@nvidia.com>
Change-Id: Id1959639399042f488cdaa30372feb65d8f21aaa
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2740446
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
2022-07-14 07:37:53 -07:00
Sagar Kamble
f246facd01 gpu: nvgpu: fix syncpt increment logic in host1x syncpt_set_minval
On host copy engine PBDMA interrupt, channel is aborted as part of the
recovery and its syncpt value is set to the max threshold.

Syncpoint may then get incremented by PBDMA (incr cmd gets processed)
after this interrupt is handled leading to syncpoint value becoming
greater than the max threshold.

Again while unbinding the channel, syncpoint value is incremented until
it reaches max threshold. Since syncpoint value is already greater than
max threshold, host1x version of nvgpu_nvhost_syncpt_set_minval will
loop for entire u32 range until it reaches max threshold and this
will hang the channel unbind.

nvgpu_nvhost_syncpt_set_minval can ensure the syncpoint value is greater
than or equal to max threshold. Hence update the check for syncpoint
value from not equal to less than.

Bug 3681100

Change-Id: I96e7a1f53d4037e9ed858a2e90dd5a8d17ed6bb0
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2742604
Reviewed-by: Debarshi Dutta <ddutta@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
GVS: Gerrit_Virtual_Submit
2022-07-12 16:54:00 -07:00
Debarshi Dutta
e89553fe62 gpu: nvgpu: add error reporting support for L4T
Add error reporting support for T194's L1SS safety
services for linux.

Used GA10B's LUT for GV11B. The error ids for T194 are
different compared to GA10B. This is handled by creating
a separate table mapping existing error ids to match GV11B.

Ids that are not used by GV11B are set to U32_MAX to indicate
the driver to not send them to the l1ss driver.

Bug 200588528

Signed-off-by: Debarshi Dutta <ddutta@nvidia.com>
Change-Id: I10a267942df77458c3deee0aad1179955490aa74
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2736772
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
2022-07-06 04:37:50 -07:00
Sagar Kamble
28ddb0996f gpu: nvgpu: acquire platforms clocks on floorsweeping gpc
bpmp will floorsweep GPCs as per parameters to tpc_pg_mask sysfs.
While doing that corresponding GPC clocks are also disabled.
nvgpu should re-initialize the clocks every time the
GPC/TPC pg_masks are passed to bpmp mrq.

Also print error when clk_prepare_enable fails.

Introduce platform->clks_lock to protect access to platform->clks
and platform->num_clks done from unrailgate/railgate and bpmp
mrq set calls from sysfs.

Acquire static_pg_lock in railgate path to synchronize railgate
with sysfs.

Bug 3688506

Change-Id: I3203d78b87289e7a847d78b3117e2d3119be3425
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2738920
Reviewed-by: Amulya Yarlagadda <ayarlagadda@nvidia.com>
GVS: Gerrit_Virtual_Submit
2022-07-05 14:37:23 -07:00
Debarshi Dutta
8cdf3a087f gpu: nvgpu: enable DEVFREQ for Sidecar
Enable DEVFREQ for OOT module unconditionally as the podgov governor
module.

linux/pm_qos is only used for downstream supported modifications
which is currently determined by CONFIG_GK20A_PM_QOS.

struct devfreq_dev_status doesn't have any field 'busy' in the upstream
driver hence enable it only for when downstream driver is in use
activated by CONFIG_GK20A_PM_QOS.

governor.h is only needed for android platforms which depend on 4.9
version of the kernel in downstream builds. Hence, added an compile
time flag to remove it for kernels versions greater than 4.9.

Jira LS-418

Signed-off-by: Debarshi Dutta <ddutta@nvidia.com>
Change-Id: Id242bd28e66ed187208f0d7975ee0bc508730a88
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2705766
(cherry picked from commit e81d0e8ff8)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2734112
Reviewed-by: Jonathan Hunter <jonathanh@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
GVS: Gerrit_Virtual_Submit
2022-06-23 21:38:45 -07:00
Tejal Kudav
b37181569b gpu: nvgpu: Make missing DT prop print conditional
Below print is misleading and seems like an error.
 [INFO]  Missing support-gpu-tools property, ret =-22

'support-gpu-tools' property was added to allow disabling debugger
features on prod boards. The debugger/profiler support will be
enabled by default, even if the property is missing.

Make the INFO print conditional, more informational and less
dramatic.

Bug 3539518

Change-Id: I5fc50df30be23e1fd1ecc06282a0d50f3ca7ac64
Signed-off-by: Tejal Kudav <tkudav@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2668464
(cherry picked from commit 69bb38f606)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2725971
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Jonathan Hunter <jonathanh@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Amulya Yarlagadda <ayarlagadda@nvidia.com>
Tested-by: Jonathan Hunter <jonathanh@nvidia.com>
GVS: Gerrit_Virtual_Submit
2022-06-14 00:37:47 -07:00
Debarshi Dutta
028b6dd811 gpu: nvgpu: update dma_mask based on H/W compatibility
To be able to access the full physical memory range, gpu's dma_mask
needs to be set to the max value of H/W compatible range.

For example. In order to support from 2GB to 66 GB, GV11B's dma_mask
needs to be atleast 37 bits. Set GV11B's dma_mask to 38 bit
and T23X's dma_mask to 39 bit. These values are supported by H/W.

Bug 3656729

Signed-off-by: Debarshi Dutta <ddutta@nvidia.com>
Change-Id: Icfff3c36a8c9cf074a254fa773c42e18020ae5de
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2723640
(cherry picked from commit 1bf9309f17)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2724566
Reviewed-by: Brad Griffis <bgriffis@nvidia.com>
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: Brad Griffis <bgriffis@nvidia.com>
2022-06-07 23:23:04 -07:00
Sagar Kamble
45c6aed68d gpu: nvgpu: fix CERT violations in nvgpu_dbg_gpu_access_gpu_va
Update nvgpu_dbg_gpu_access_gpu_va to:
1. Ensure that integer conversions do not result in lost or
   misinterpreted data.
2. Do not dereference null pointers.

CID 436748
CID 473585
CID 254272
CID 490303
Bug 3512546

Change-Id: I551484b671aa48175a8cea119885eac478c2731c
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2707019
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
GVS: Gerrit_Virtual_Submit
2022-05-07 23:24:44 -07:00
Sagar Kamble
c1202d7283 gpu: nvgpu: assert that priv is non-NULL in gk20a_alloc_comptags
priv data is available when gk20a_alloc_comptags is called hence add
assert for it.

CID 274852
Bug 3512546

Change-Id: I9d907153c359900071f0f89b84d2ee15141dd874
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2707492
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
GVS: Gerrit_Virtual_Submit
2022-05-07 15:18:56 -07:00
Sagar Kamble
75c9a2eb94 gpu: nvgpu: fix nvgpu_dma_alloc_flags_sys cleanup
aligned_size was decremented from g->dma_memory_used in case
of failure post dma alloc. However, aligned_size is not
initialized at that point. Use size instead.

CID 446040
Bug 3512546

Change-Id: Id1e117703a3c24dcb9c0b6f3b808c7e30bf90f0b
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2707486
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
GVS: Gerrit_Virtual_Submit
2022-05-07 15:18:45 -07:00
Johnny Liu
69ec2dcff7 gpu: nvgpu: ga10b+: emc scaling using ICC
For EMC frequency scaling, prior to ga10b, nvgpu driver
was using BWMGR. On ga10b+, BWMGR support is deprecated
and moved to Linux ICC framework.

Jira NVGPU-7312
Bug 3514055
Bug 200766984

Change-Id: Ib1f87afe021414dfc563e007823f93098937fe59
Signed-off-by: Johnny Liu <johnliu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2706374
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Rajkumar Kasirajan <rkasirajan@nvidia.com>
Reviewed-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
GVS: Gerrit_Virtual_Submit
2022-05-06 05:21:55 -07:00
Rajesh Devaraj
fac998940c gpu: nvgpu: enable polling support for error reporting in AV+L
As per Safety_Services, a client must perform polling to ensure that the
previously reported errors are cleared at FSI, in case of back-to-back
error reporting. However, to minimize the polling overhead, NvGPU driver
performs polling only when the error to be reported is corrected error
to ensure that it is not overwriting the previously reported
uncorrected/corrected error. In case of uncorrected errors, it will be
reported without doing polling. This situation leads to a failure in
error reporting, when uncorrected errors are reported back-to-back. This
is acceptable for safety builds where SW quiesce will be triggered
immediately after the reporting of first uncorrected error. In case of
other build configurations, MCU/SEH takes the decision on encountering
uncorrected errors. To handle such build configurations, polling is
enabled for all types of errors, in all build configurations.

This patch also removes an unused macro "ERR_TYPE_MASK".

Bug 3622420

Change-Id: I750b0406faec9b229d8d0c74e986807234362cb9
Signed-off-by: Rajesh Devaraj <rdevaraj@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2707105
Reviewed-by: Tejal Kudav <tkudav@nvidia.com>
Reviewed-by: Vaibhav Kachore <vkachore@nvidia.com>
GVS: Gerrit_Virtual_Submit
2022-05-06 05:21:43 -07:00
Martin Radev
657daaee9e gpu: nvgpu: Mark fds with O_CLOEXEC
There shouldn't be an usecase that an fd, installed by nvgpu,
must be shared on exec with the new process. This doesn't only
lead to excessive number of fds in the exec process, but also
can lead to potential security issues.

This patch marks the fds with O_CLOEXEC, so that they get
closed on exec.

Bug 3583628

Change-Id: I3499b1429ac512b2c172e9e628d0a7a1417d72e3
Signed-off-by: Martin Radev <mradev@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2704350
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
GVS: Gerrit_Virtual_Submit
2022-05-03 20:33:58 -07:00
Richard Zhao
c30afdce02 gpu: nvgpu: add periodic timer API
move fecs_trace polling from kthread to timer API.

Jira GVSCI-10883

Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Change-Id: I224754b7205f1d0eefdc19a73a98f42e4d3e9d0e
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2700601
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Shashank Singh <shashsingh@nvidia.com>
Reviewed-by: Aparna Das <aparnad@nvidia.com>
GVS: Gerrit_Virtual_Submit
2022-05-02 23:16:44 -07:00
Antony Clince Alex
61ae0b7642 gpu: nvgpu: fix emulate mode enable
The emulate mode support is determined after chip detect and is flagged
by using NVGPU_SUPPORT_EMULATE_MODE flag. The present logic prevents
user from configuring the emulate mode sysfs knobs if this flag is not
set, however the emulate mode usecase requires the user to configure the
syfs knob prior to power-on, hence defer emulate mode check to a later
stage after chip detect.

Bug 3621460

Change-Id: If522527542fa8d7e95ccbcff43b74adbb9e976e6
Signed-off-by: Antony Clince Alex <aalex@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2703953
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Mayur Poojary <mpoojary@nvidia.com>
Reviewed-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-by: Ankur Kishore <ankkishore@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: David Li <davli@nvidia.com>
2022-04-29 06:17:59 -07:00
Jinesh Parakh
e3ed309d35 gpu: nvgpu: Fix Unintentional integer overflow bug
Fix following Coverity defect:
cde.c : Unintentional integer overflow

The Coverity issue suggests that (u64) (nvgpu_ltc_get_ltc_count(g) * nvgpu_ltc_get_slices_per_ltc(g) * nvgpu_ltc_get_cacheline_size(g)) can cause overflow because typecasting is done after multiplication.
This patch solves that issue by typecasting it before multiplication.

CID 10112360

Bug 3460991

Signed-off-by: Jinesh Parakh <jparakh@nvidia.com>
Change-Id: I314ca7a9adc95fcb09f15eb603b56ad03ce34b99
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2697027
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
2022-04-29 06:11:31 -07:00
Jinesh Parakh
622fe70dab gpu: nvgpu: Fix Bad bit shift Coverity issues
Fixed following Coverity Defects:
ioctl_as.c : Bad bit shift operation
mc_tu104.c : Bad bit shift operation
vm.c : Bad bit shift operation
vm_remap.c : Bad bit shift operation

A new linux header file for ilog2 is created.
The files which used the old ilog2 function
have been changed to use the new nvgpu_ilog2
function.

CID 9847922
CID 9869507
CID 9859508
CID 10112314
CID 10127813
CID 10127899
CID 10128004

Signed-off-by: Jinesh Parakh <jparakh@nvidia.com>
Change-Id: Ia201eea7cc426c3d6581e1e5ae3b882dbab3b490
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2700994
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
2022-04-28 04:08:45 -07:00
Antony Clince Alex
0b0b68be72 gpu: nvgpu: prof: print error if profiling with PG enabled
Prior to starting any profiling session, GPU power features should be
disabled, not doing this can result in unexpected behavior, print a
error message under such situations.

Jira NVGPU-7326
Bug 3579926

Change-Id: Ia9716d73ed945a588792a7d843aed64bf3b7f83b
Signed-off-by: Antony Clince Alex <aalex@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2701501
Reviewed-by: Ankur Kishore <ankkishore@nvidia.com>
GVS: Gerrit_Virtual_Submit
2022-04-25 09:02:29 -07:00
Ninad Malwade
2710721e63 nvgpu: reorder the check for same mask value
After the board boots up, we have a specific set of settings for
each power mode which contains, fbp, tpc mask values, cpu, gpu
frequencies etc. So, we need to make sure to provide all the setting
values for each mode so that those will be applied correctly.
So, the fbp, tpc, gpc mask could be same in different power modes
and since the golden image context check which comes before is
returning -ENODEV, the nvpmodel service fails to set the power mode.

Thus, we need to compare whether the fbp and gpc mask values are same
before we check for the golden image context.

Bug 3581634

Change-Id: I3fb1398d47cd37bf49ad70cf80b057d4b80dec04
Signed-off-by: Ninad Malwade <nmalwade@nvidia.com>
(cherry picked from commit a27e202402)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2688116
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
2022-04-20 04:28:54 -07:00
Sagar Kamble
c1a9281720 gpu: nvgpu: ensure the buffer is RW when doing vmap
RO buffers should not be accessed via any paths in userspace/kernel.
vmap is one such path. nvmap now returns error if vmap is attempted
on RO buffer. However that leads to kernel warning. nvgpu should
ensure that buffer is RW before performing vmap on the buffer.

With this check, dma_buf_vmap will not be called for RO buffers.

Bug 3562426

Change-Id: I4782d2ae6b17243fdb3d0fc5d5d732a17f694a7c
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2693976
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Puneet Saxena <puneets@nvidia.com>
Reviewed-by: Martin Radev <mradev@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
GVS: Gerrit_Virtual_Submit
2022-04-14 17:03:14 -07:00
Sagar Kamble
b58363d36f gpu: nvgpu: fix resource leak in nvgpu_prof_ioctl_vab_flush
Allocated user_data is not freed on error from gk20a_busy. Free it.

CID 10129907
Bug 3460991

Change-Id: Ic30b3cee1028a4829360fb591b90f29f74e6bdce
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2693941
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
2022-04-14 17:03:09 -07:00
Jinesh Parakh
02b108d26d gpu: nvgpu: Fix Unchecked Return Value bugs
Propagate errors from previously unchecked function calls.
This fixes the following Coverity Defects:

nvlink.c : Unchecked return value
sysfs.c : Unchecked return value
nvlink_probe.c : Unchecked return value
ioctl_nvs.c : Unchecked return value

CID 9847567
CID 9848580
CID 10127940
CID 10129447

Bug 3460991
Signed-off-by: Jinesh Parakh <jparakh@nvidia.com>
Change-Id: I930bf34a451d6d941359ad76c84cf1fef2df1351
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2689111
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
2022-04-14 10:23:36 -07:00
Sagar Kamble
120a653dd1 gpu: nvgpu: fix untrusted loop bound in clk_set_info ioctl
In gk20a_ctrl_dev_ioctl clk_set_info: An unscrutinized value num_entries
is used as a loop bound. An attacker could control the number of times
the loop iterates.

Loop iterator is signed int which can lead to unpredictable results,
Hence change it to u32. And sanitize the num_entries parameter.

CID 1993996
Bug 3460991

Change-Id: Ib644cf19f016ab80a3f2d66f156ca863f8e138e1
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2693942
Reviewed-by: Ramesh Mylavarapu <rmylavarapu@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
GVS: Gerrit_Virtual_Submit
2022-04-13 14:06:50 -07:00
Jon Hunter
86c0a696ed gpu: nvgpu: Fix build for Linux v5.18
Upstream commit 7938f4218168 ("dma-buf-map: Rename to iosys-map")
renames 'struct dma_buf_map' to 'struct iosys_map' and breaks building
the NVGPU driver with Linux v5.18-rc1. In the NVGPU driver there are
many places where 'dma_buf_map' is used and so to clean-up the code and
minimise the impact of this change, add a gk20a_dmabuf_vmap() and a
gk20a_dmabuf_vunmap() helper function. These new functions support all
kernel versions and eliminate a lot the KERNEL_VERSION ifdefs.

Bug 3598986

Change-Id: Id0f904ec0662f20f3d699b74efd9542d12344228
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2693970
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
2022-04-12 16:34:10 -07:00
Antony Clince Alex
19a8adeae1 gpu: nvgpu: prof: add new resource type
Add new profiler resource type NVGPU_PROFILER_PM_RESOURCE_TYPE_PC_SAMPLER.
Introduce regops HAL get_hwpm_pc_sampler_register_ranges to get
allowlist for PC_SAMPLER resources. Re-generate allowlist files to include
register ranges for PC_SAMPLER resources.

Update uapi header to advertise new resource type
NVGPU_PROFILER_PM_RESOURCE_ARG_PC_SAMPLER.

Bug 3408536

Change-Id: I7009ef822665771eed727da48ef1e89dcc6b9c4b
Signed-off-by: Antony Clince Alex <aalex@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2689057
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
GVS: Gerrit_Virtual_Submit
2022-04-12 16:30:52 -07:00
Vedashree Vidwans
a112c5d9dd gpu: nvgpu: modify channel wdt for non-si
Increase channel watchdog value for non-si platforms.

Bug 3553564

Change-Id: I42277255599afb09b11f8321ca9b2f124f502933
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2420872
Tested-by: Sagar Kadamati <skadamati@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
GVS: Gerrit_Virtual_Submit
2022-04-07 23:56:53 -07:00
Divya
0946df9865 gpu: nvgpu: add aelpg flag check in sysfs node
- When read from aelpg_param_read sysfs node and
  write to aelpg_param_store sysfs node is done it
  leads to system crash.
- This issue is seen on safety build as power features
  are not enabled.
- To avoid this crash, add aelpg platform flag check in
  aelpg_param_read and aelpg_param_store sysfs nodes.
- Also, as AELPG depends on ELPG add can_elpg check before
  enabling/disabling aelpg through sysfs node.

Bug 3582946

Change-Id: Iaf709db2b5dc0340390767f4b06a0ac06962ed77
Signed-off-by: Divya <dsinghatwari@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2690548
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
GVS: Gerrit_Virtual_Submit
2022-04-07 12:39:36 -07:00
Sagar Kamble
ad85b60bb0 gpu: nvgpu: use nvmem API to read fuses
Replace the usage of tegra_fuse_readl with nvmem_cell_read_u32 for the
below fuse registers added as nvmem cells on v5.10+ kernels.

Older nvidia kernels do not have these tegra nvmem cell support.

1. FUSE_GCPLEX_CONFIG_FUSE_0
2. FUSE_RESERVED_CALIB0_0
3. FUSE_PDI0
4. FUSE_PDI1

bug 200633045

Change-Id: I187400720929233fcbc1970c9bbed34347b0a9a7
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2670828
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Jonathan Hunter <jonathanh@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
GVS: Gerrit_Virtual_Submit
2022-04-07 12:35:22 -07:00
Jinesh Parakh
bbaf01590c gpu: nvgpu: Fix Logically dead code Coverity bugs
Fixed following Coverity Defects:

ioctl_clk_arb.c : Logically dead code
gr_gp10b.c : Logically dead code
vfe_var.c : Logically dead code
grmgr_ga10b.c : Logically dead code
vm_remap.c : Logically dead code
falcon_debug.c : Logically dead code

CID 1994001
CID 3008644
CID 9870823
CID 10062537
CID 10127915
CID 10128008

Bug 3460991
Signed-off-by: Jinesh Parakh <jparakh@nvidia.com>
Change-Id: I711d2ccb480328d8f0a4ba49e877612669f3d41f
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2686362
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
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Reviewed-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
GVS: Gerrit_Virtual_Submit
2022-03-28 07:36:44 -07:00
Jinesh Parakh
d4cb2eb3c0 gpu: nvgpu: Fix Dereference Coverity issues
Fixed following Coverity Defects:

fw.c : Dereference after null check
channel.c : Dereference before null check
log.c : Dereference before null check

CID 10064128
CID 10056456
CID 10127934

Bug 3460991

Signed-off-by: Jinesh Parakh <jparakh@nvidia.com>
Change-Id: I9c075f5c38c2254d5c656af58bb002714bd53396
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2685320
Reviewed-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
GVS: Gerrit_Virtual_Submit
2022-03-28 07:36:10 -07:00
Konsta Hölttä
e9d453806c gpu: nvgpu: move duplicate timer api to common
The high level API for the timer unit is the same across all OSs, so
get rid of the slight code duplication by moving the timer init
functions under a new file in common code:

- nvgpu_timeout_init_cpu_timer
- nvgpu_timeout_init_cpu_timer_sw
- nvgpu_timeout_init_retry

Much of the timer logic is also duplicated, but it is mixed between OS
specific current time retrieval. With some refactoring and addition of
an OS independent time keeping layer, that logic could also be made
shared.

Change-Id: I75d02ceb0d32022b0ba7f3bcd9fdb13d47039dbc
Signed-off-by: Konsta Hölttä <kholtta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2669510
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2022-03-25 21:33:21 -07:00