Commit Graph

6 Commits

Author SHA1 Message Date
Shashank Singh
19a3b86f06 gpu: nvgpu: remove unused code from common.nvgpu on safety build
- remove unused code from common.nvgpu unit on safety build. Also,
remove the code which uses them in other places.
- document use of compiler intrinsics as mandated in code inspection
  checklist.

Jira NVGPU-6876

Change-Id: Ifd16dd197d297f56a517ca155da4ed145015204c
Signed-off-by: Shashank Singh <shashsingh@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2561584
(cherry picked from commit 900391071e9a7d0448cbc1bb6ed57677459712a4)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2561583
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2022-02-17 04:58:32 -08:00
Antony Clince Alex
f41e5975d8 gpu: nvgpu: add ioctl to configure l2 max_ways_evict_last
Add ioctl support to configure and read the max number of lines/ways
in a L2 cache set that can be marked as EVICT_LAST. This is accomplished
through two new ltc hals: set_l2_max_ways_evict_last,
get_l2_max_ways_evict_last. These hals will only be set for nvgpu-next
chips. Incase of legacy chips, the IOCTLs will return error -ENOSYS.

Generate following litter constants to get the number of sets in a l2
slice and the number of ways in each set:
- GPU_LIT_NUM_LTC_LTS_SETS
- GPU_LIT_NUM_LTC_LTS_WAYS

Add gpu characteritics flag: NVGPU_L2_MAX_WAYS_EVICT_LAST_ENABLED to
allow userspace driver to determine if L2_MAX_WAYS_EVICT_LAST ioctl is
supported.

Bug 200605474

Change-Id: Id3180f891399f5e128500f3835d762aee59953e0
Signed-off-by: Antony Clince Alex <aalex@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2445884
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2021-03-12 04:36:22 -08:00
Vedashree Vidwans
58ce9156a8 gpu: nvgpu: get gpc/tpc addr width from litter
Some chips have GPC/TPC address width exposed through litter value.
- Add GPC/TPC address width to litter value.
- Update pri_gpccs_addr_width() and pri_tpccs_addr_width() to read value
from litter value.

JIRA NVGPU-5598

Change-Id: I534fa3188e3412f7e1b7bbf61c8227c966895ea5
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2371425
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Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
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GVS: Gerrit_Virtual_Submit
2020-12-15 14:13:28 -06:00
Seema Khowala
98886cd28e gpu: nvgpu: volta+: add litter value for SM UNIQUE_BASE & SHARED_BASE
Starting volta, multiple SMs are supported. In order to convert
SM broadcast registers to unicast registers, sm_unique_base
and sm_shared_base are required.

Bug 2960720
JIRA NVGPU-5502

Change-Id: Ie9ebc0ab814cf551801f6cac1298a791d184f894
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2340792
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2020-12-15 14:13:28 -06:00
Seshendra Gadagottu
d8058743d7 gpu: nvgpu: prepare class unit for safety build
Move graphics related defs and functions under CONFIG_NVGPU_GRAPHICS
switch.
Move classes not supported in GV11B under CONFIG_NVGPU_NON_FUSA
switch.
Add missing valid class numbers to gpu_class.is_valid HAL.
Also remove un-used class defs from class.h header.

Lot of qnx safety tests are still using graphics 3d class.
Until those tests got fixed, allowing 3d graphics class
as valid class for safety build.

JIRA NVGPU-4301

Change-Id: Ifd2a13bee3210821799c2bca10e7245eb3c79121
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Signed-off-by: Tejal Kudav <tkudav@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2224658
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2020-12-15 14:10:29 -06:00
Philip Elcan
9a450fe2bf gpu: nvgpu: init: take out the litter
Move the get_litter() functions out of the main hal init to its own
source file for each device. This allows removal of the hw_proj_*.h
files in the main hal init file. This reduces the number of hw header
includes per file creating better code isolation.

JIRA NVGPU-3274

Change-Id: I9e04294434acf274ccc2236646f0f15f710a6976
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2107751
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2019-05-02 13:45:16 -07:00