Commit Graph

3 Commits

Author SHA1 Message Date
Mahantesh Kumbar
a22a9c2bcf gpu: nvgpu: create PMU super surface unit
Created PMU super surface unit & moved structs/functions related to
super surface under a unit, separated super surface structs into
private/public based on its usage/access, made changes to supper
surface dependent files to reflect supper surface changes
respective to unit.

JIRA NVGPU-3045

Change-Id: I6ac426052eb60f00b432d9533460aa0afd939fe3
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2088405
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-04-08 04:16:16 -07:00
Abdul Salam
179e3cf84a gpu: nvpgu: Fix exit path of PMU and clk_arb
This patch fixes below two issues.
1.Currently clk arb exit is called after GPU registers are released.
  This causes crash when clk arb WQ accesses GPU HW register for status.
  The ideal way is to exit the clk_arb which removes the WQ from running
  before calling lockout register.
2.Check if dGPU is dying during processing of PMU Commands.
  This prevents race condition when PMU is waiting for response and device
  is shutdown.

Bug 200488054

Change-Id: I812b07af7db4494d5ea2ed6197742ceb23d30a4b
Signed-off-by: Abdul Salam <absalam@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2081916
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-04-08 03:06:43 -07:00
Sagar Kamble
16fdf8351b gpu: nvgpu: move sources to pmu ipc element
pmu command, message, queues, sequences are part of pmu's infrastructure
for IPC. Create common/pmu/ipc folder and move all these sources there.

JIRA NVGPU-1970

Change-Id: If8c80adff93a1bf9e601f1734628c5eaa09dc3ef
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2079147
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-04-05 05:06:38 -07:00