Commit Graph

5 Commits

Author SHA1 Message Date
Abdul Salam
d339d9ed33 gpu: nvgpu: segregate clk_mon from clk unit.
As a part of refactoring this CL removes clk_mon unit from
clk unit.
Clk_mon is used for monitoring of clk and it is an independent unit.
This patch does the following.
*Move the clk_mon struct from clk.h to clk_mon_tu104.h
*create a new clk_mon gpu_ops and assign clk_mon specific ops there.
*Move all the function to clk_mon_tu104.c
*Update the yaml file

NVGPU-4689

Change-Id: Ia72bf28a93ce9a7936c277076f365c4b6593b032
Signed-off-by: Abdul Salam <absalam@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2336230
Reviewed-by: automaticguardword <automaticguardword@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-by: Vaibhav Kachore <vkachore@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2020-12-15 14:13:28 -06:00
Jeremy Ho
6118009b84 gpu: nvgpu: remove reversed ordering for deadlock
In some cases, we would get deadlock issue due to there are two locks
acquisition on common clk driver's lock and nvgpu driver's locks. At
the bug, inconsistent lock ordering problem will come with one thread
gets "nvgpu lock -> clk lock" and the other thread gets "clk lock ->
nvgpu lock".

Slove the latter path with one-time initializing clk_parent entry
and use cached data afterward.

Bug 2555115

Change-Id: I31c5c2728f406307e7cfd4e555f4db0c163234d8
Signed-off-by: Jeremy Ho <jeremyh@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2146727
(cherry picked from commit 42c2bdfb9f)
Reviewed-on: https://git-master.nvidia.com/r/2160290
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2020-12-15 14:05:52 -06:00
Antony Clince Alex
b60dca5e0a gpu: nvgpu: fix MISRA violations in clk frequency macros
- Fix Misra rule 20.7: Macro parameter expands into an expression without being
  wrapped by parentheses.
- Following two macros has been updated to fix the above violation,
  HZ_TO_MHZ_ULL and MHZ_TO_HZ_ULL.

Jira NVGPU-3176

Change-Id: I03f7d8f7d5c91ca33fcc594fed0359d5c62eea6b
Signed-off-by: Antony Clince Alex <aalex@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2120192
GVS: Gerrit_Virtual_Submit
Reviewed-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-by: Vaibhav Kachore <vkachore@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-05-22 10:46:30 -07:00
Peng Liu
cc70f89bb4 Revert "gpu: nvgpu: cache gpu clk rate"
This reverts commit e9a6d179a4 ("gpu: nvgpu: cache gpu clk rate")

 - Real clock rate doesn't always equal clock rate requested by caller
 - call of clk_set_rate() and update of cached_rate are not atomic
 - Real root cause for Bug 2051688 is in bpmp and gboost design


Bug 2538692

Change-Id: I9248e0c69e2271ed2d0070587db59afa6f8160f2
Signed-off-by: Peng Liu <pengliu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2109708
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-05-06 16:46:00 -07:00
Philip Elcan
edaddb9bb2 gpu: nvgpu: create nvgpu.common.hal.clk
Create unit nvgpu.common.hal.clk in by moving clk_*.[ch] files to
hal/clk path. Also update makefiles and include files to match.

JIRA NVGPU-2020

Change-Id: Ied217cfac2b000a2d22eda582d6030d0479b1310
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2101400
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-04-22 14:15:22 -07:00