Regenerate clock gating lists. Add new blocks, and takes them into
use. Also moves some clock gating settings to be applied at the
earliest possible moment right after reset.
Change-Id: I21888186c200f7a477c63bd3332e8ed578f63741
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/457698
In gk20a_do_idle(), to get pointer to platform_device of gk20a,
we use bus_find_device_by_name() and pass "gk20a.0" to it
But this hard coding fails on gm20b since GPU device name
there is "gpu"
Hence to fix this add a static pointer handle "gk20a_handle"
to struct gk20a in gk20a.c
Now we can access this global pointer inside do_idle()
to get gk20a pointer and from that we can get pointer to
platform_device
Change-Id: I1a65588e34ad36efed0fa587bb365f0ee81e253d
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/486887
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
The nvgpu driver now supports using the Tegra graphics virtualization
interfaces to support gk20a in a virtualized environment.
Bug 1509608
Change-Id: I6ede15ee7bf0b0ad8a13e8eb5f557c3516ead676
Signed-off-by: Aingara Paramakuru <aparamakuru@nvidia.com>
Reviewed-on: http://git-master/r/440122
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
Modify the 3d.emc policy to use a formula based on bandwidth and
utilization instead of the current sku-dependent policy.
Bug 1364894
Change-Id: Id97f765a48f0aa9f5ebeb0c82bccb22db474a1ae
Signed-off-by: Samuel Russell <samuelr@nvidia.com>
Reviewed-on: http://git-master/r/453586
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
Workaround for GPU hang if boost turns GPU on before it is
initialized.
Bug 1435870
Change-Id: I07d0617049612344ca7c494da8cb8d75789984e5
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/453375
This patch adds support for executing a precompiled GPU program to
allow exporting GPU buffers to other graphics units that have color
decompression engine (CDE) support.
Bug 1409151
Change-Id: Id0c930923f2449b85a6555de71d7ec93eed238ae
Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-on: http://git-master/r/360418
Reviewed-by: Lauri Peltonen <lpeltonen@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Currently gk20a gets reference of host1x via phandle in
Device Tree. But runtime PM does not seem to be handling power
dependencies too well in this case and hence some times host1x
is off when we need it.
To fix this, exlicitly power on host1x while powering gpu up.
Do this via "busy" and "idle" callbacks from gk20a_platform
Bug 1534272
Bug 200022536
Change-Id: Ia562ee19722cfc8edc5626a5a058ab8edfe3d206
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
- gk20a_enable is reading the clock after unlocking the spinlock
to flush any previous write
- This could lead to a race if any write afterwards assume
the write has been completed already
- Read the clock before unlocking to ensure all previous writes
have been completed before letting any other thread use gk20a
Bug 200007520
Change-Id: I737fbbe825c68b25ca256c4a8ee2b99aa8baf0f5
Signed-off-by: Sang-Hun Lee <sanlee@nvidia.com>
Reviewed-on: http://git-master/r/418485
(cherry picked from commit 2aed542a719caa69620766bf2dceefe50626c189)
Reviewed-on: http://git-master/r/437842
Reviewed-by: Mitch Luban <mluban@nvidia.com>
Tested-by: Mitch Luban <mluban@nvidia.com>
Add a way to force idle and reset the GPU in case where GPU
rail gating is not supported
(i.e. platform->can_railgate = false)
In this case, we follow below sequence :
- once GPU is idle, get runtime reference which enables the clocks
- call prepare_poweroff() to save the state explicitly
- perform explicit reset assert/deassert
- call finalize_poweron() to restore the state
- drop the runtime reference taken earlier
Bug 1525284
Change-Id: Id5f3ec152093acd585631dfbf785d8e0561f9048
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/435620
GVS: Gerrit_Virtual_Submit
Reviewed-by: Arto Merilainen <amerilainen@nvidia.com>
Tested-by: Arto Merilainen <amerilainen@nvidia.com>
Increase the wait delays in do_idle() to 2000 mS and make use
of msleep instead of mdelays
Also, to check if GPU is rail gated or not, add a do-while()
loop which will keep checking the status and bail out as soon
as GPU is rail gated
This increase in delays is required to allow GPU sufficient
time to complete its work and get rail gated
These delays are specially needed during stress testing where
it is possible that a large amount of GPU work is blocked
during do_idle() and then it might take more time to complete
it while next do_idle() is waiting for it
Also, remove waiting on API gk20a_wait_channel_idle() for each
channels since it is sufficient to wait for refcount to be 1
bug 1529160
Change-Id: Ie541485fbdda76d79ae4a75dda928da240fc5d8f
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/434192
(cherry picked from commit 5a621bf2aaf3355e1330a662dc98e943d68ef86d)
Reviewed-on: http://git-master/r/435133
Reviewed-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
While we are executing do_idle() API, it is possible that
unrailgate() gets invoked in midst of idling the GPU and
this can result in failure of do_idle()
To prevent simultaneous execution of these methods,
add a mutex railgate_lock and acquire it during
do_idle() and unrailgate() APIs
Also, keep this lock held if do_idle() is successful.
In success, lock will be released in do_unidle(),
otherwise release this lock before returning
Note that this lock should not be held in railgate() API
since we do not want it to be blocked during do_idle()
bug 1529160
Change-Id: I87114b5367eaa217376455a2699c0d21c451c889
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/434190
(cherry picked from commit 561dc8e0933ff2d72573292968b893a52f5f783a)
Reviewed-on: http://git-master/r/435131
Reviewed-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
This patch adds support to check if the host1x link exists and is
supported using the gpu characteristics ioctl.
Bug 1459653
Change-Id: I832eea217ed7f007e341dfde5769887e0882d6bb
Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-on: http://git-master/r/433058
This is to weed out accesses to the GPU while it is gated. Otherwise
the accesses are silently dropped or cause a HW hang (on older chips).
Bug 1514949
Change-Id: Ice4cdb9f1f736978ebb3db847f39c7439bf98134
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: http://git-master/r/416339
Reviewed-by: Mitch Luban <mluban@nvidia.com>
Separate the code to load PMU firmware from the software init. This
allows folding ACR and non-ACR PMU software initialization sequences.
Bug 200006956
Change-Id: I74b289747852167e8ebf1be63036c790ae634da4
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/424768
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Do not abort GPU probe if secure page alloc fails.
We can just note that this allocation failed (using bool
secure_alloc_ready) and prevent further secure memory
allocation if this flag is not set.
Bug 1525465
Change-Id: Ie4eb6393951690174013d2de3db507876d7b657f
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/427730
GVS: Gerrit_Virtual_Submit
Reviewed-by: Shridhar Rasal <srasal@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Make gpu power management feature configurations
as platform data. Keep existing sttaus for gk20a
and disable all power features for gm20b.
Bug 1523728
Change-Id: Ife7786863f18e21b882ac77085c7abc7c84d4cfc
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: http://git-master/r/426369
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Supriya Sharatkumar <ssharatkumar@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
During gk20a_pm_prepare_poweroff(), if call to gk20a_channel_suspend()
fails, we proceed to disable other components and then return error.
But when genpd sees the error, it will abort the suspend sequence and
keep the device state as active.
But since we have already disabled all the components, GPU lands in
invalid state.
Hence, if channel_suspend() fails then do not proceed but return
the error immediately
Bug 200010416
Change-Id: I553a2a25832a1be4941bb6b6ce490c950cdbe7fa
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/422248
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
VPR resize is done by forcing GPU to idle and then updating
VPR size from TLK.
There is no need now to call vpr_resize funtion from kernel
and hence these functions can be removed.
Bug 1487804
Change-Id: I758a6e0a99a58757866f1138b0a89594e2a33908
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/421703
(cherry picked from commit 391d9bacf053fe0dacffc76c36768f82912ad1f4)
Reviewed-on: http://git-master/r/419612
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
Allocate dummy secure buffer of size PAGE_SIZE during gk20a_probe().
This will also help to initiate first secure memory (VPR)
resize call while GPU is rail gated and in reset.
This dummy buffer is released after we allocate some more
secure memory buffers in alloc_global_ctx_buffers()
Bug 1487804
Change-Id: I61604d9e5ffb585801ee893435c98a0d3e69d666
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/421701
(cherry picked from commit 4236ab3323ee3c02fac562740d8b80d763589dea)
Reviewed-on: http://git-master/r/419610
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
This patch reorders scaling resume to happen always when
we power on the GPU, so as to balance the scaling suspend
when we power off GPU.
bug 200010911
Change-Id: I9fde817fbf9fed7d90c48ea06050db4b82e670a8
Signed-off-by: Allen Yu <alleny@nvidia.com>
Reviewed-on: http://git-master/r/421541
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Rewrite PMU boot sequence as a state machine. At PMU power-up send
initial messages, and reset state machine. At each reply from PMU,
do the next stage of PMU boot and set state.
As now PMU and FECS boot are independent, we need to ensure engine
idle before saving ZBC.
Change-Id: I1ea747ab794ef08f1784eeabfdae7655d585ff21
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/410205
Otherwise other trace event headers included may also be created, which
leads to duplicate definition issues in the 3.14 kernel.
Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>
Add below two new APIs for gk20a :
1) gk20a_do_idle()
this API will force GPU to idle and railgate
2) gk20a_do_unidle()
this API will unblock all the tasks blocked by do_idle()
Bug 1487804
Change-Id: Ic5e7f2d19fb8d35f43666d0e309dde3022349d92
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/412061
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
- add rw_semaphore busy_lock for gpu busy() path
- take read lock on busy_lock inside gk20a_busy()
so that all usual requests can execute simultaneously
- write lock can be taken when we need to block all
of the gk20a_busy() calls
Bug 1487804
Change-Id: I1b162b38bce9621723d3e45280c6076816cf771a
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/412060
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
Add gk20a as a sub power domain of host1x. This enforces keeping
host1x on when using gk20a.
Bug 200003112
Change-Id: I08db595bc7b819d86d33fb98af0d8fb4de369463
Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-on: http://git-master/r/407006
(cherry picked from commit 009812b3e510518740e9c7e89b8b8b80439fe26a)
Reviewed-on: http://git-master/r/408013
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
When rail gating, we cleared all PMU status. Clear only the relevant
fields.
Change-Id: I5b4e8d74339aae6f1c6b945f45b8378bb563e8be
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/406843
Remove the path for turning on only gk20a. Always when turning on
hardware, turn both host1x and GPU on.
Change-Id: I5f972a487d3348bf2254bdb0fadb42ca600a559e
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/406405
Currently the generic platform is used only if the device tree
defines that we have a generic platform available, however, the
generic platform is fully compatible with the gk20a we have in tegra.
This patch modifies the definitions so that we use generic platform
also for tegra - even if if tegra configuration option is not enabled.
Bug 1434573
Change-Id: Ib35ce0ab935d27764e960bf4d74a5016ae047a1f
Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-on: http://git-master/r/396867
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Call railgate and unrailgate ops only if they are defined.
Change-Id: I0a87ac0259af3719098d4372be7e25f0a54416fc
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/396375
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-by: Bo Yan <byan@nvidia.com>
Two calls to gk20a_init_gpu_characteristics() is not needed.
GPU sim aperture was defined twice.
Change-Id: Iaf78611717c55b1cae456358fcae2641ad552d9f
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/383855
Reviewed-by: Automatic_Commit_Validation_User
This patch adds an interface for the gk20a driver to have
generic ops which are implemented by a chip specific HAL
layer. The HAL layer is provided by the gpu_ops struct which
defines function pointers for chip specific oeprations. This
is necessary for supporting multiple chips with the same
code base and minimal per chip hacking.
Also, since much code is common except in the HW headers
that are needed, the LTC common code is compiled by first
including the necessary chip specific header(s) and then
including the ltc common code file.
This allows for easy updating of functions that are only
different between chips as a result of register offset and
field changes whereas the HAL provides the mechanism for
functions that have actual semantic changes.
Change-Id: I96f9a8350d34e7e101beb141d4521fab69dcfbae
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: http://git-master/r/360627
(cherry picked from commit fe90cad939cf979fc2516a96e5911bd8ab6fc457)
Reviewed-on: http://git-master/r/362228
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
