Synchronize gk20a and gm20b headers. All registers which were added
to gk20a are now added to gm20b, and some registers that are unused
are removed.
Bug 1567274
Change-Id: Ia3b7958c148e495cbff420ee56bb448db0f58680
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/590313
GVS: Gerrit_Virtual_Submit
- add and export API "gk20a_fifo_recover_tsg()" to
recover a TSG
- if TSG is running on any engine, then trigger MMU fault
on those engines
- otherwise, abort each channel in TSG
- modify channel specific API engines_on_ch() to generic
engines_on_id() which will take an ID and a flag to specify
whether ID is for channel or TSG and return engines running
on that ID
- modify channel specific API get_faulty_channel() to generic
get_faulty_id_type() which will take pointers to ID and type
of ID (either a regular channel or TSG)
- remove runlist update from recover_ch() since
no need to touch runlist during recovery
- set error notifier first and then only abort the channels
for TSG recovery path
- also, add necessary accessors to get engine
status type as TSG
Bug 1470692
Change-Id: I7137f611f80916b3d256d4b0dc6e5cf1e93eef6f
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/497873
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Add API gk20a_fifo_preempt_tsg() which takes ID of tsg
and preempts it
Bug 1514064
Bug 1470692
Change-Id: I1d52c1dd7a9aecc1314b0f223fe4eedecc033629
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/495583
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
update headers from latest gen_register/ip_check info
Change-Id: Iae892ab7138e7bba4abc821b9d7893e768647daa
Signed-off-by: Ken Adams <kadams@nvidia.com>
Reviewed-on: http://git-master/r/399382
