Commit Graph

106 Commits

Author SHA1 Message Date
Mahantesh Kumbar
268721975c gpu: nvgpu: PMU reset reorg
- nvgpu_pmu_reset() as pmu reset for
all chips & removed gk20a_pmu_reset() &
gp106_pmu_reset() along with dependent
code.

- Created ops to do PMU engine reset & to
know the engine reset status

- Removed pmu.reset ops & replaced with
nvgpu_flcn_reset(pmu->flcn)

- Moved sec2 reset to sec2_gp106 from
pmu_gp106 & cleaned PMU code part of sec2.

JIRA NVGPU-99

Change-Id: I7575e4ca2b34922d73d171f6a41bfcdc2f40dc96
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: https://git-master/r/1507881
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-06-29 13:29:52 -07:00
Mahantesh Kumbar
fe3fc43401 gpu: nvgpu: falcon copy to DMEM support
- Added falcon interface/HAL copy to DMEM
method.

JIRA NVGPU-99

Change-Id: I783f8046e96d9e47091afb943697256c289ebab6
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: https://git-master/r/1506576
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2017-06-27 03:58:15 -07:00
Mahantesh Kumbar
b7b38d1cd6 gpu: nvgpu: falcon copy from DMEM
- Added interface/HAL method for falcon
to support copy from dmem
- Method to read dmem size
- Method to check error on input parameters

JIRA NVGPU-99

Change-Id: Id27b2b7f4f338196fc3b187555718543445d35bd
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: https://git-master/r/1506525
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2017-06-27 03:57:45 -07:00
Mahantesh Kumbar
be04b9b1b5 gpu: nvgpu: falcon reset support
- Added flacon reset dependent interface & HAL
  methods to perform falcon reset.
- method to wait for idle
- method to reset falcon
- method to set irq
- method to read status of CPU
- Updated falcon ops pointer to point gk20a
  falcon HAL methods
- Added members to know support of falcon
  & interrupt.
- Added falcon dependency ops member to support
  flacon speicifc methods

JIRA NVGPU-99
JIRA NVGPU-101

Change-Id: I411477e5696a61ee73caebfdab625763b522c255
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: http://git-master/r/1469453
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
2017-06-23 01:14:18 -07:00
Mahantesh Kumbar
f97d62eb8f gpu: nvgpu: Avoid NULL dereference of flcn
-issue: flcn pointer in nvgpu_flcn_sw_init()
 will be NULL in default case of switch,
 and that results in NULL pointer
 dereference on flcn->flcn_id.
-Fix: Used flcn_id parameter to print
 falcon id in default case.

Coverity ID: 2514311
Coverity ID: 2514313

Bug 200291879

Change-Id: I7008817c22cdf8d9d9027cc1b724e2424b4a3d8e
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: http://git-master/r/1491694
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2017-05-31 10:14:51 -07:00
Mahantesh Kumbar
f30a685f48 gpu: nvgpu: interface layer for falcon
- struct nvgpu_falcon to hold properties of falcon controller
- falcon controller interface layer which establish access
to required falcon controller HAL based on struct nvgpu_falcon member
flcn_id & flcn_base parameter.
- each falcon nvgpu_falcon struct initialized during init
with id, base-address along with other properties at HAL.
- Added defines related to flacon controller.

Change-Id: Ia7777c01ecc542150ddd72f8603b7b4475522b58
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: http://git-master/r/1467523
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-05-02 23:36:07 -07:00