5 Commits

Author	SHA1	Message	Date
Thomas Fleury	c6e8257c44	gpu: nvgpu: gv100: add IPA to PA translation ... Add IPA to PA translation for GV100 nvlink / pass-through mode - define platform->phys_addr(g, ipa) method - call nvgpu_init_soc_vars from nvgpu_tegra_pci_probe - in nvgpu_init_soc_vars, define set platform->phys_addr to nvgpu_tegra_hv_ipa_pa, if hypervisor is present. - in __nvgpu_sgl_phys, use sg_phys, then apply platform->phys_addr if defined. - implement IPA to PA translation in nvgpu_tegra_hv_ipa_pa Bug 200392719 Change-Id: I622049ddc62c2a57a665dd259c1bb4ed3843a537 Signed-off-by: Thomas Fleury <tfleury@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1673582 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: Richard Zhao <rizhao@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>	2018-03-13 00:04:31 -07:00
Seema Khowala	5944f49f55	gpu: nvgpu: wrapper for checking if bpmp running ... Add nvgpu_is_bpmp_running API for checking if bpmp is running or not. This API will call tegra_bpmp_running() and return the value retured by tegra_bpmp_running() Bug 2018223 Change-Id: I42c1dbec65733fdc89a8fc3846e8c3afb2dcfb8d Signed-off-by: Seema Khowala <seemaj@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1595349 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>	2017-11-14 15:46:55 -08:00
William Pierce	542a75a949	nvgpu: linsim removal ... Removed multiple tegra_platform_is_linsim if statements because of linsim deprecation. Bug 1903831 Change-Id: I4985b0e56d26db4813e4f4235b25e5cff47745f8 Signed-off-by: William Pierce <wpierce@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1485033 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Alex Waterman <alexw@nvidia.com> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>	2017-07-26 18:56:12 -07:00
Seema Khowala	c8821f49ba	gpu: nvgpu: fpga: set gr_idle_timeout_default ... set gr_idle_timeout_default to 100000 ms instead of MAX_SCHEDULE_TIMEOUT, and enable timeouts_enabled Change-Id: I0b4d014dc6f3fc3c365214f7ffad7af054f771b9 Signed-off-by: Seema Khowala <seemaj@nvidia.com> Reviewed-on: http://git-master/r/1458178 Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>	2017-04-16 16:45:49 -07:00
Terje Bergstrom	19fdb429c2	gpu: nvgpu: Wrappers for checking platform type ... Add nvgpu_* wrappers for determining if we're running in simulation or silicon, and if we're running in hypervisor. The new wrappers require struct gk20a pointer, and gk20a_fence_wait() did not have access to one. Add struct gk20a pointer as the first parameter. JIRA NVGPU-16 Change-Id: I73b2b8f091ca29fb1827054abd2adaf583710331 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1331565 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>	2017-04-11 10:56:06 -07:00