4 Commits

Author	SHA1	Message	Date
Vedashree Vidwans	cd7194cbc0	gpu: nvgpu: modify gmmu page table entry functions ... Move below chip agnostic gmmu pte functions to common/mm/gmmu/pte.c. - gmmu_aperture_mask() - pte_dbg_print() Default big page size for all chips is 64K. So, move gp10b_mm_get_default_big_page_size() to common file and rename as nvgpu_gmmu_default_big_page_size(). Modify gv11b_gpu_phys_addr() to use get_iommu_bit() hal. JIRA NVGPU-4666 Change-Id: I512c42723faf2d03e5b367879c9c385dcf52cdc2 Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2329560 Reviewed-by: automaticguardword <automaticguardword@nvidia.com> Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com> Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com> Reviewed-by: Alex Waterman <alexw@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com> GVS: Gerrit_Virtual_Submit Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>	2020-12-15 14:13:28 -06:00
Nicolas Benech	9a4ad88f21	gpu: nvgpu: hal: split MM-related HALs based on FUSA ... This patch moves MM HALs that are guaranteed to be functionaly safe into _fusa.c files. HALs that are not part of FUSA are not compiled anymore when the safety profile is enabled. Given a HAL source file: - it may contain only FUSA code, in that case the source file is simply renamed with the _fusa postfix. - it may contain only non-FUSA code, in that case the file is left as-is - it may contain a mix, in that case the original file will now only contain non-FUSA code, and all FUSA code will be moved into a new source file with the _fusa postfix. JIRA NVGPU-3690 Change-Id: I44c604aef2d72252abb7da1c0ef1210d71a0efa7 Signed-off-by: Nicolas Benech <nbenech@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2140895 GVS: Gerrit_Virtual_Submit Reviewed-by: Sagar Kamble <skamble@nvidia.com> Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>	2019-06-27 01:36:07 -07:00
Thomas Fleury	8a9d329468	gpu: nvgpu: fix MISRA 10.3 violations in nvgpu.hal.mm.gmmu ... Fixed MISRA 10.3 violations by using explicit casts, and changing essential types. Jira NVGPU-3284 Change-Id: If16c09a5100a9437e3e22bc53a81d3d1687d5cb1 Signed-off-by: Thomas Fleury <tfleury@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2119615 GVS: Gerrit_Virtual_Submit Reviewed-by: Philip Elcan <pelcan@nvidia.com> Reviewed-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>	2019-05-16 10:57:52 -07:00
Alex Waterman	00d7b53b73	gpu: nvgpu: Move remaining GMMU HAL code to hal/mm/gmmu/ ... Move the remaining GMMU HAL related code from the gm20b/, gp10b/, and gv11b/ directories to new gmmu hal source files. Also update all makefiles and HAL init code to refelct the new location of the headers and source code. JIRA NVGPU-2042 Change-Id: Ic9b85cc547bd0f994ad11042fc4093c517327399 Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2103672 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>	2019-04-26 09:36:26 -07:00