Commit Graph

15 Commits

Author SHA1 Message Date
Alex Waterman
fba96fdc09 gpu: nvgpu: Replace nvgpu_engine_info with nvgpu_device
Delete the struct nvgpu_engine_info as it's essentially identical to
struct nvgpu_device. Duplicating data structures is not ideal as it's
terribly confusing what does what.

Update all uses of nvgpu_engine_info to use struct nvgpu_device. This
is often a fairly straight forward replacement. Couple of places though
where things got interesting:

  - The enum_type that engine_info uses is defined in engines.h and
    has a bit of SW abstraction - in particular the GRCE type. The only
    place this seemed to be actually relevant (the IOCTL providing device
    info to userspace) the GRCE engines can be worked out by comparing
    runlist ID.
  - Addition of masks based on intr_id and reset_id; those can be
    computed easily enough using BIT32() but this is an area that
    could be improved on.

This reaches into a lot of extraneous code that traverses the fifo
active engines list and dramtically simplifies this. Now, instead of
having to go through a table of engine IDs that point to the list of
all host engines, the active engine list is just a list of pointers to
valid engines. It's now trivial to do a for-all-active-engines type
loop. This could even be turned into a generic macro or otherwise
abstracted in the future.

JIRA NVGPU-5421

Change-Id: I3a810deb55a7dd8c09836fd2dae85d3e28eb23cf
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2319895
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2020-12-15 14:13:28 -06:00
Antony Clince Alex
da8ee8d615 gpu: nvgpu: add therm_max_fpdiv_factor gops.therm
Use therm_max_fpdiv_factor gops.therm for nvgpu-next to get the maximum
fp_div_factor.

Jira NVGPU-4860

Signed-off-by: Antony Clince Alex <aalex@nvidia.com>
Change-Id: If0e9b82f5b61289e226ceeff386fc88763af66e2
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2313336
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2020-12-15 14:13:28 -06:00
Thomas Fleury
6fa5da61d7 gpu: nvgpu: use engine_id to access engine_info
Generalize use of "engine_id" variable name to index f->engine_info.

Jira NVGPU-4511

Change-Id: Ie3bc2c701dc3bab833d6ac134273dd6a102528c2
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2262219
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2020-12-15 14:10:29 -06:00
Thomas Fleury
66b68edd6b gpu: nvgpu: iterator name for active_engines
Some functions used engine_id or eng_id to index active_engines_list,
which could get confusing when used in conjunction with similar
variable as active_engine_id or act_eng_id.

Use generic iterator name i or j instead, to make it clear that
f->active_engines_list is NOT indexed by engine id.

Jira NVGPU-4511

Change-Id: I07a6bf00dfb6d4e608b10f2f79e38a70e557428c
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2262218
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2020-12-15 14:10:29 -06:00
Philip Elcan
fadcf3ab7f gpu: nvgpu: therm: move non-fusa therm hal
The HAL gm20b_therm_init_blcg_mode() is not used in FUSA builds, so move
it to the non-FUSA file.

This leaves the file therm_gm20b_fusa.c without code, so remove that
file.

JIRA NVGPU-936

Change-Id: Id3cb4e65035654ef5823906794544005e4e48de2
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2260439
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2020-12-15 14:10:29 -06:00
rmylavarapu
65a7896987 nvgpu: gpu: Implement PMU therm channel get status
Currently nvgpu reads the temperature by reading the
NV_THERM_I2CS_SENSOR_00 register. Below are the issues
with current approach
    1) NV_THERM_I2CS_SENSOR_00 doesn't support
       fractional precision which is POR.
    2) It doesn't support negative temperatures which
       is required for Auto.
    3) It doesn't take into account the right POR
       sensor in VFE VBIOS tables.

From therm channel get status interface we can read the
current temperature from PMU.

NVBUG - 200549047

Change-Id: I2fb21926208876f3d3bebe3f2dee08edafedbc7d
Signed-off-by: rmylavarapu <rmylavarapu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2196224
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2020-12-15 14:10:29 -06:00
Adeel Raza
3107bc862b gpu: nvgpu: ifdef function prototypes in headers
ifdef function prototypes with CONFIG_* defines. This fixes MISRA rule
8.6 violations which complain about undefined functions.

JIRA NVGPU-3873

Change-Id: I4794eceed475672f347621ac25c09552a25d4ac1
Signed-off-by: Adeel Raza <araza@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2195585
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2020-12-15 14:05:52 -06:00
Debarshi Dutta
69ef86e627 gpu: nvgpu: move safe code HAL files to fusa
This patch moves all the safe static and non-static functions as well
as its dependencies such as static declared structs into files with
_fusa.c extension. If the original file is left with no functions
remaining then the file is deleted.

Added changes in Makefile, Makefile.sources, nvgpu-hal-new.yaml for
compilation.

Jira NVGPU-3690

Change-Id: I81af67c308705faf8a681df63a6778e7de2076cf
Signed-off-by: Debarshi Dutta <ddutta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2146761
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Reviewed-by: Sagar Kamble <skamble@nvidia.com>
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2019-07-03 02:46:15 -07:00
Sagar Kamble
5d37a9e489 gpu: nvgpu: compile out sim changes from safety build
As sim is non-safe unit compile it out. Also removed FMODEL related
nvgpu changes and unit tests from the safety build.

JIRA NVGPU-3527

Change-Id: I22c83e195a09f9150fb6f5a3afff91df2ea075b9
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2139455
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
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2019-06-20 16:05:33 -07:00
Abdul Salam
7e8d0c2bb1 gpu: nvgpu: Move from TSENSE to TSOSC for TU104
In TU104 tsense is not calibrated and tsosc needs to be used.
Tsosc is the POR for TU104.
This patch does the following
Remove the GP106 related thermal header and Add TU104 therm.
Rename the files from therm_gp106 to therm_tu104.
Update the debug fs interface to reflect the same.
Update the yaml files.

Bug 200526122

Change-Id: I73fd7d4c516426b5c6b84762480be2d6d572d5a7
Signed-off-by: Abdul Salam <absalam@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2135139
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2019-06-13 23:05:43 -07:00
Mahantesh Kumbar
3d1169544f gpu: nvgpu: alloc space for PMU's struct nvgpu_pmu at runtime
Allocating space for struct nvgpu_pmu at run time as part of
nvgpu_pmu_early_init() stage and made required changes to
dependent fiels as needed.

JIRA NVGPU-1972

Change-Id: I2d1c86d713e533c256ba95b730aa2e9543a66438
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2110109
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2019-05-23 00:56:55 -07:00
Seema Khowala
defc27ac9b gpu: nvgpu: cg fix MISRA violations
Fix Rule 10.1

Rename gk20a_readl and gk20a_writel
Moved ELCG_* and BLCG_* defines from gk20a.h to cg.h
Cleaned up checkpatch errors

JIRA NVGPU-3424

Change-Id: I8d7de11dd7beb22c0fe44ff770af3b2609434385
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2115908
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2019-05-10 11:42:52 -07:00
Abdul Salam
b6b1af387d gpu: nvgpu: Add pmu as argument for all therm functions
Add struct nvgpu_pmu as argument for all therm functions.
This will help in unit testing of public functions in therm unit.

Jira NVGPU-3216

Change-Id: Icf48c68bacda2f65dfaa9578f46c0a588c683ed4
Signed-off-by: Abdul Salam <absalam@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2113641
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Reviewed-by: Mahantesh Kumbar <mkumbar@nvidia.com>
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2019-05-09 09:23:47 -07:00
Seema Khowala
cfb4ff0bfb gpu: nvgpu: rename struct fifo_gk20a
Rename
struct fifo_gk20a -> nvgpu_fifo

JIRA NVGPU-2012

Change-Id: Ifb5854592c88894ecd830da092ada27c7f05380d
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2109625
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Reviewed-by: Alex Waterman <alexw@nvidia.com>
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Reviewed-by: Adeel Raza <araza@nvidia.com>
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2019-05-03 16:25:43 -07:00
Seshendra Gadagottu
db339fd52f gpu: nvgpu: therm: move chip specific files to hal
Move thermal chip specific files to hal from common.

JIRA NVGPU-2018

Change-Id: I5022ddb4a2ab7f723936e027ffaa1222272095c0
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2070185
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2019-03-14 14:44:45 -07:00